diff mbox series

ARM: dts: stm32: Adjust PLL4 settings on AV96 again

Message ID 20200822204525.63774-1-marex@denx.de
State Accepted
Commit b6055945d66d0f4e3b1ecb82af476232067a4ee4
Delegated to: Patrick Delaunay
Headers show
Series ARM: dts: stm32: Adjust PLL4 settings on AV96 again | expand

Commit Message

Marek Vasut Aug. 22, 2020, 8:45 p.m. UTC
PLL4Q is supplying both FDCAN and LTDC. In case HDMI is in use, the
50 MHz generated from PLL4Q cannot be divided well enough to produce
accurate clock for HDMI pixel clock. Adjust it to generate 74.25 MHz
instead. The PLL4P/PLL4R are generating 99 MHz instead of 100 MHz,
which is in tolerance for the SDMMC.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Gerald Baeza <gerald.baeza@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
---
NOTE: Thanks to Gerald for this suggestion.
---
 arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Patrick DELAUNAY Sept. 9, 2020, 12:29 p.m. UTC | #1
Hi Marek,

> From: Marek Vasut <marex@denx.de>
> Sent: samedi 22 août 2020 22:45
> 
> PLL4Q is supplying both FDCAN and LTDC. In case HDMI is in use, the
> 50 MHz generated from PLL4Q cannot be divided well enough to produce accurate
> clock for HDMI pixel clock. Adjust it to generate 74.25 MHz instead. The
> PLL4P/PLL4R are generating 99 MHz instead of 100 MHz, which is in tolerance for
> the SDMMC.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Gerald Baeza <gerald.baeza@st.com>
> Cc: Patrick Delaunay <patrick.delaunay@st.com>
> Cc: Patrice Chotard <patrice.chotard@st.com>
> ---
> NOTE: Thanks to Gerald for this suggestion.
> ---
>  arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
> b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
> index 7529068c51..c73318488d 100644
> --- a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
> +++ b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
> @@ -132,11 +132,11 @@
>  		u-boot,dm-pre-reloc;
>  	};
> 
> -	/* VCO = 600.0 MHz => P = 100, Q = 50, R = 100 */
> +	/* VCO = 600.0 MHz => P = 99, Q = 74, R = 99 */
>  	pll4: st,pll@3 {
>  		compatible = "st,stm32mp1-pll";
>  		reg = <3>;
> -		cfg = < 1 49 5 11 5 PQR(1,1,1) >;
> +		cfg = < 3 98 5 7 5 PQR(1,1,1) >;
>  		u-boot,dm-pre-reloc;
>  	};
>  };
> --
> 2.28.0

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>

Applied to u-boot-stm/master, thanks!

Thanks

Patrick
diff mbox series

Patch

diff --git a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
index 7529068c51..c73318488d 100644
--- a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
@@ -132,11 +132,11 @@ 
 		u-boot,dm-pre-reloc;
 	};
 
-	/* VCO = 600.0 MHz => P = 100, Q = 50, R = 100 */
+	/* VCO = 600.0 MHz => P = 99, Q = 74, R = 99 */
 	pll4: st,pll@3 {
 		compatible = "st,stm32mp1-pll";
 		reg = <3>;
-		cfg = < 1 49 5 11 5 PQR(1,1,1) >;
+		cfg = < 3 98 5 7 5 PQR(1,1,1) >;
 		u-boot,dm-pre-reloc;
 	};
 };