diff mbox series

[v1,07/16] arm: socfpga: soc64: Add SMC helper function for Intel SOCFPGA (64bits)

Message ID 20200817043431.28718-8-chee.hong.ang@intel.com
State New
Delegated to: Simon Goldschmidt
Headers show
Series Enable ARM Trusted Firmware for U-Boot | expand

Commit Message

Ang, Chee Hong Aug. 17, 2020, 4:34 a.m. UTC
invoke_smc() allow U-Boot proper running in non-secure mode (EL2)
to invoke SMC call to ATF's PSCI runtime services such as
System Manager's registers access, 2nd phase bitstream FPGA
reconfiguration, Remote System Update (RSU) and etc.

smc_send_mailbox() is a send mailbox command helper function which invokes
the ATF's PSCI runtime service (function ID: INTEL_SIP_SMC_MBOX_SEND_CMD)
to send mailbox messages to Secure Device Manager (SDM).

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
---
 arch/arm/mach-socfpga/Makefile               |  2 +
 arch/arm/mach-socfpga/include/mach/smc_api.h | 13 +++++
 arch/arm/mach-socfpga/smc_api.c              | 56 ++++++++++++++++++++
 3 files changed, 71 insertions(+)
 create mode 100644 arch/arm/mach-socfpga/include/mach/smc_api.h
 create mode 100644 arch/arm/mach-socfpga/smc_api.c

Comments

Tan, Ley Foon Sept. 11, 2020, 9:03 a.m. UTC | #1
> -----Original Message-----
> From: Ang, Chee Hong <chee.hong.ang@intel.com>
> Sent: Monday, August 17, 2020 12:34 PM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut <marex@denx.de>; Simon Goldschmidt
> <simon.k.r.goldschmidt@gmail.com>; Tom Rini <trini@konsulko.com>; See,
> Chin Liang <chin.liang.see@intel.com>; Tan, Ley Foon
> <ley.foon.tan@intel.com>; Ang, Chee Hong <chee.hong.ang@intel.com>;
> Chee, Tien Fong <tien.fong.chee@intel.com>; Lim, Elly Siew Chin
> <elly.siew.chin.lim@intel.com>
> Subject: [PATCH v1 07/16] arm: socfpga: soc64: Add SMC helper function for
> Intel SOCFPGA (64bits)
> 
> invoke_smc() allow U-Boot proper running in non-secure mode (EL2) to
> invoke SMC call to ATF's PSCI runtime services such as System Manager's
> registers access, 2nd phase bitstream FPGA reconfiguration, Remote System
> Update (RSU) and etc.
> 
> smc_send_mailbox() is a send mailbox command helper function which
> invokes the ATF's PSCI runtime service (function ID:
> INTEL_SIP_SMC_MBOX_SEND_CMD) to send mailbox messages to Secure
> Device Manager (SDM).
> 
> Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
> ---
>  arch/arm/mach-socfpga/Makefile               |  2 +
>  arch/arm/mach-socfpga/include/mach/smc_api.h | 13 +++++
>  arch/arm/mach-socfpga/smc_api.c              | 56 ++++++++++++++++++++
>  3 files changed, 71 insertions(+)
>  create mode 100644 arch/arm/mach-socfpga/include/mach/smc_api.h
>  create mode 100644 arch/arm/mach-socfpga/smc_api.c
> 
> diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-
> socfpga/Makefile index c63162a5c6..0b05283a7a 100644
> --- a/arch/arm/mach-socfpga/Makefile
> +++ b/arch/arm/mach-socfpga/Makefile
> @@ -72,6 +72,8 @@ ifdef CONFIG_TARGET_SOCFPGA_AGILEX
>  obj-y	+= firewall.o
>  obj-y	+= spl_agilex.o
>  endif
> +else
> +obj-$(CONFIG_SPL_ATF) += smc_api.o
>  endif
> 
>  ifdef CONFIG_TARGET_SOCFPGA_GEN5
> diff --git a/arch/arm/mach-socfpga/include/mach/smc_api.h
> b/arch/arm/mach-socfpga/include/mach/smc_api.h
> new file mode 100644
> index 0000000000..bbefdd8dd9
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/include/mach/smc_api.h
> @@ -0,0 +1,13 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright (C) 2020 Intel Corporation  */
> +
> +#ifndef _SMC_API_H_
> +#define _SMC_API_H_
> +
> +int invoke_smc(u32 func_id, u64 *args, int arg_len, u64 *ret_arg, int
> +ret_len); int smc_send_mailbox(u32 cmd, u32 len, u32 *arg, u8 urgent, u32
> *resp_buf_len,
> +		     u32 *resp_buf);
> +
> +#endif /* _SMC_API_H_ */
> diff --git a/arch/arm/mach-socfpga/smc_api.c b/arch/arm/mach-
> socfpga/smc_api.c new file mode 100644 index 0000000000..085daba162
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/smc_api.c
> @@ -0,0 +1,56 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2020 Intel Corporation <www.intel.com>
> + *
> + */
> +
> +#include <common.h>
> +#include <asm/ptrace.h>
> +#include <asm/system.h>
> +#include <linux/intel-smc.h>
> +
> +int invoke_smc(u32 func_id, u64 *args, int arg_len, u64 *ret_arg, int
> +ret_len) {
> +	struct pt_regs regs;
> +
> +	memset(&regs, 0, sizeof(regs));
> +	regs.regs[0] = func_id;
> +
> +	if (args)
> +		memcpy(&regs.regs[1], args, arg_len * sizeof(*args));
> +
> +	smc_call(&regs);
> +
> +	if (ret_arg)
> +		memcpy(ret_arg, &regs.regs[1], ret_len * sizeof(*ret_arg));
> +
> +	return regs.regs[0];
> +}
> +
> +int smc_send_mailbox(u32 cmd, u32 len, u32 *arg, u8 urgent, u32
> *resp_buf_len,
> +		     u32 *resp_buf)
> +{
> +	int ret;
> +	u64 args[6];
> +	u64 resp[3];
> +
> +	args[0] = cmd;
> +	args[1] = (u64)arg;
> +	args[2] = len;
> +	args[3] = urgent;
> +	args[4] = (u64)resp_buf;
> +	if (resp_buf_len)
> +		args[5] = *resp_buf_len;
> +	else
> +		args[5] = 0;
> +
> +	ret = invoke_smc(INTEL_SIP_SMC_MBOX_SEND_CMD, args,
> ARRAY_SIZE(args),
> +			 resp, ARRAY_SIZE(resp));
> +
> +	if (ret == INTEL_SIP_SMC_STATUS_OK && resp_buf && resp_buf_len)
> {
> +		if (!resp[0])
> +			*resp_buf_len = resp[1];
> +	}
> +
> +	return (int)resp[0];
> +}
> --
> 2.19.0

Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
diff mbox series

Patch

diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index c63162a5c6..0b05283a7a 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -72,6 +72,8 @@  ifdef CONFIG_TARGET_SOCFPGA_AGILEX
 obj-y	+= firewall.o
 obj-y	+= spl_agilex.o
 endif
+else
+obj-$(CONFIG_SPL_ATF) += smc_api.o
 endif
 
 ifdef CONFIG_TARGET_SOCFPGA_GEN5
diff --git a/arch/arm/mach-socfpga/include/mach/smc_api.h b/arch/arm/mach-socfpga/include/mach/smc_api.h
new file mode 100644
index 0000000000..bbefdd8dd9
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/smc_api.h
@@ -0,0 +1,13 @@ 
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2020 Intel Corporation
+ */
+
+#ifndef _SMC_API_H_
+#define _SMC_API_H_
+
+int invoke_smc(u32 func_id, u64 *args, int arg_len, u64 *ret_arg, int ret_len);
+int smc_send_mailbox(u32 cmd, u32 len, u32 *arg, u8 urgent, u32 *resp_buf_len,
+		     u32 *resp_buf);
+
+#endif /* _SMC_API_H_ */
diff --git a/arch/arm/mach-socfpga/smc_api.c b/arch/arm/mach-socfpga/smc_api.c
new file mode 100644
index 0000000000..085daba162
--- /dev/null
+++ b/arch/arm/mach-socfpga/smc_api.c
@@ -0,0 +1,56 @@ 
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Intel Corporation <www.intel.com>
+ *
+ */
+
+#include <common.h>
+#include <asm/ptrace.h>
+#include <asm/system.h>
+#include <linux/intel-smc.h>
+
+int invoke_smc(u32 func_id, u64 *args, int arg_len, u64 *ret_arg, int ret_len)
+{
+	struct pt_regs regs;
+
+	memset(&regs, 0, sizeof(regs));
+	regs.regs[0] = func_id;
+
+	if (args)
+		memcpy(&regs.regs[1], args, arg_len * sizeof(*args));
+
+	smc_call(&regs);
+
+	if (ret_arg)
+		memcpy(ret_arg, &regs.regs[1], ret_len * sizeof(*ret_arg));
+
+	return regs.regs[0];
+}
+
+int smc_send_mailbox(u32 cmd, u32 len, u32 *arg, u8 urgent, u32 *resp_buf_len,
+		     u32 *resp_buf)
+{
+	int ret;
+	u64 args[6];
+	u64 resp[3];
+
+	args[0] = cmd;
+	args[1] = (u64)arg;
+	args[2] = len;
+	args[3] = urgent;
+	args[4] = (u64)resp_buf;
+	if (resp_buf_len)
+		args[5] = *resp_buf_len;
+	else
+		args[5] = 0;
+
+	ret = invoke_smc(INTEL_SIP_SMC_MBOX_SEND_CMD, args, ARRAY_SIZE(args),
+			 resp, ARRAY_SIZE(resp));
+
+	if (ret == INTEL_SIP_SMC_STATUS_OK && resp_buf && resp_buf_len) {
+		if (!resp[0])
+			*resp_buf_len = resp[1];
+	}
+
+	return (int)resp[0];
+}