| Message ID | 20200814030723.84383-1-chee.hong.ang@intel.com |
|---|---|
| State | Accepted |
| Commit | 5bbeaaefec67bd794ea8652a9cada9e5380b6805 |
| Delegated to: | Simon Goldschmidt |
| Headers | show |
| Series | [v1] arm: socfpga: soc64: Disable CONFIG_PSCI_RESET | expand |
> -----Original Message----- > From: Ang, Chee Hong <chee.hong.ang@intel.com> > Sent: Friday, August 14, 2020 11:07 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut <marex@denx.de>; Simon Goldschmidt > <simon.k.r.goldschmidt@gmail.com>; Tom Rini <trini@konsulko.com>; See, > Chin Liang <chin.liang.see@intel.com>; Tan, Ley Foon > <ley.foon.tan@intel.com>; Ang, Chee Hong <chee.hong.ang@intel.com>; > Chee, Tien Fong <tien.fong.chee@intel.com>; Lim, Elly Siew Chin > <elly.siew.chin.lim@intel.com> > Subject: [PATCH v1] arm: socfpga: soc64: Disable CONFIG_PSCI_RESET > > Don't invoke 'SYSTEM_RESET' PSCI function because PSCI function calls are > not supported by u-boot running in EL3. > > Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> > --- > configs/socfpga_agilex_defconfig | 1 + > configs/socfpga_stratix10_defconfig | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/configs/socfpga_agilex_defconfig > b/configs/socfpga_agilex_defconfig > index a08f66e248..feaab00249 100644 > --- a/configs/socfpga_agilex_defconfig > +++ b/configs/socfpga_agilex_defconfig > @@ -12,6 +12,7 @@ CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y > CONFIG_IDENT_STRING="socfpga_agilex" > CONFIG_SPL_FS_FAT=y > CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" > +# CONFIG_PSCI_RESET is not set > CONFIG_BOOTDELAY=5 > CONFIG_USE_BOOTARGS=y > CONFIG_BOOTARGS="earlycon" > diff --git a/configs/socfpga_stratix10_defconfig > b/configs/socfpga_stratix10_defconfig > index 04e354f59e..e7c7550112 100644 > --- a/configs/socfpga_stratix10_defconfig > +++ b/configs/socfpga_stratix10_defconfig > @@ -14,6 +14,7 @@ CONFIG_SPL_FS_FAT=y > CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk" > CONFIG_OPTIMIZE_INLINING=y > CONFIG_SPL_OPTIMIZE_INLINING=y > +# CONFIG_PSCI_RESET is not set > CONFIG_BOOTDELAY=5 > CONFIG_USE_BOOTARGS=y > CONFIG_BOOTARGS="earlycon" > -- Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com> Regards Ley Foon
diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index a08f66e248..feaab00249 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -12,6 +12,7 @@ CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y CONFIG_IDENT_STRING="socfpga_agilex" CONFIG_SPL_FS_FAT=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" +# CONFIG_PSCI_RESET is not set CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon" diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index 04e354f59e..e7c7550112 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_FS_FAT=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk" CONFIG_OPTIMIZE_INLINING=y CONFIG_SPL_OPTIMIZE_INLINING=y +# CONFIG_PSCI_RESET is not set CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon"
Don't invoke 'SYSTEM_RESET' PSCI function because PSCI function calls are not supported by u-boot running in EL3. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> --- configs/socfpga_agilex_defconfig | 1 + configs/socfpga_stratix10_defconfig | 1 + 2 files changed, 2 insertions(+)