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[108.51.35.162]) by smtp.gmail.com with ESMTPSA id k134sm6976538qke.60.2020.08.07.07.43.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Aug 2020 07:43:33 -0700 (PDT) From: Sean Anderson To: u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Cc: Heinrich Schuchardt , Jagan Teki , Eugeniy Paltsev , Horatiu Vultur , Marek Vasut , Sean Anderson Subject: [PATCH v2 04/10] spi: dw: Rearrange struct dw_spi_priv Date: Fri, 7 Aug 2020 10:43:11 -0400 Message-Id: <20200807144317.282868-5-seanga2@gmail.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200807144317.282868-1-seanga2@gmail.com> References: <20200807144317.282868-1-seanga2@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean This should reduce the size of the struct, and also groups more similar fields together. Signed-off-by: Sean Anderson --- Changes in v2: -New drivers/spi/designware_spi.c | 27 +++++++++++++-------------- 1 file changed, 13 insertions(+), 14 deletions(-) diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c index e0bb44259d..f92e17feac 100644 --- a/drivers/spi/designware_spi.c +++ b/drivers/spi/designware_spi.c @@ -95,27 +95,26 @@ struct dw_spi_platdata { }; struct dw_spi_priv { - void __iomem *regs; - unsigned int freq; /* Default frequency */ - unsigned int mode; struct clk clk; - unsigned long bus_clk_rate; - + struct reset_ctl_bulk resets; struct gpio_desc cs_gpio; /* External chip-select gpio */ - int bits_per_word; - u8 cs; /* chip select pin */ - u8 tmode; /* TR/TO/RO/EEPROM */ - u8 type; /* SPI/SSP/MicroWire */ - int len; + void __iomem *regs; + unsigned long bus_clk_rate; + unsigned int freq; /* Default frequency */ + unsigned int mode; - u32 fifo_len; /* depth of the FIFO buffer */ - void *tx; - void *tx_end; + const void *tx; + const void *tx_end; void *rx; void *rx_end; + u32 fifo_len; /* depth of the FIFO buffer */ - struct reset_ctl_bulk resets; + int bits_per_word; + int len; + u8 cs; /* chip select pin */ + u8 tmode; /* TR/TO/RO/EEPROM */ + u8 type; /* SPI/SSP/MicroWire */ }; static inline u32 dw_read(struct dw_spi_priv *priv, u32 offset)