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Tue, 28 Jul 2020 20:05:43 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=gmx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=xypron.glpk@gmx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gmx.net; s=badeba3b8450; t=1595959543; bh=9KCkuiBJm/+tKcsgmd1xhRB94tJLca9Em3hj4DCglAY=; h=X-UI-Sender-Class:From:To:Cc:Subject:Date; b=gWRU7mSy0s9jvgpuip15WuKJqZxUF80Uk8gqE6ydzJO4I9NpHcU3Wy1/GZk71tAVf 2+kDz5pwNuGfMy50bdM569LOPmVO4M5fXP523GFj8Adu0VAFlFzw2W28Y6ctRr+IjZ DvZcjNugcKC1rXAEFIySedboj/FipG7gsZQSuYG8= X-UI-Sender-Class: 01bb95c1-4bf8-414a-932a-4f6e2808ef9c Received: from workstation4.fritz.box ([178.202.41.107]) by mail.gmx.com (mrgmx004 [212.227.17.184]) with ESMTPSA (Nemesis) id 1MWics-1kFmpi3tyi-00X46i; Tue, 28 Jul 2020 20:05:43 +0200 From: Heinrich Schuchardt To: Sean Anderson Cc: u-boot@lists.denx.de, Heinrich Schuchardt Subject: [PATCH v2 1/1] doc: riscv: Update documentation for Sipeed MAIX boards Date: Tue, 28 Jul 2020 20:05:30 +0200 Message-Id: <20200728180530.135264-1-xypron.glpk@gmx.de> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-Provags-ID: V03:K1:y2LTrTK505v3PI7cmu5nwWr3pI0LE6GgwheSCTE9jFCdOwqa4Fp crsLBhatuqw14OmIoMX2zPd5NN3Cykx8Sm8xxh+XwHKaJ5ij7dFiq6HzHxxRnqEKg7Xe0+A zd79QMhkhVlt16+WHNLAIWHRxm0zE3xO+CXCJ8FENkOdiuHGh1corp85awkGre42Qncr1c6 mZmsaYNYfKbbozdIURXcg== X-UI-Out-Filterresults: notjunk:1;V03:K0:2SqR2834ew8=:z8Z61ygKvo7fejAfWTDidt n5SD9p2qD6eScXnce0F1+ZmADlVvAFRT6H/C8rKRLYuqKCBipKTJtQTYNTdnlKsjA53fBn5DX MNWbF/AHW/1Nb08KzaoMJz63D2C3PXLOWOaVhmpuvHK9mMlkwY9aagXb0Ij/ODZQxSq5IdJs5 GeeRK76xvpkwG6UovL4p2Na+uLDSXXq4pnw9LY2EM0g44f6/yZ0kBCuWWu1KZkUP18ujq7yr4 Ozse2FPexUOY673v/5hpxYCVBctZUIRVk5fntrGKmvLdmdY7VlxtmaGA0VG3EpgO2PBwSHqOJ T29J4s1sZZVZB5pBOH8790vJTxp2EM4w2QX5CIUorJUfMRL/PugXdMfAvg61qPrZn8LPJyI3+ ZezKCJATZAMaFa/8pQiE0vRGFm1mFRxtIhOfVMPcemhIvUNKeFnTd/stucSGV6+M3YMY48BVF aLOhv/k+bRaFgP2rfeg/DLTPhe1zEnFYXdKWLU6a4OtjXAL1KnShbHLwmzIIa0Nms6iG5mPC5 GvJh/VuJOOaM9pJssHBeZwJLBn/sGa36eo+MVyBt/+fAC01kw4wxNX49NrgjgK3MIEJ5hUACF YHitnEpFuJ3sy8HN1rjPBjq2ks7vn7Pbsf5NPs9UIEQ1SHDYbeuyzca8anrizh0b6NNChIjIV KOqZ9BsSVSoY03sA8Clu2H4/H+/+MR4xF1+zcDzSo9bw5q8GDr9OrrHX6qe8I3Cin9C0x9Oh4 9WBseMCX4p4KRWeR9HqLHzT7Czr90d5uPQ+f7Jqz7dJWgpq+QxnMCUX+3aOOHZ07sRNANqoG4 Vom170ZhgqvQqAFZB9iy/NlU7wYMXcgUXq43Ze1dvUQ2n+1kcG4VbT/WeviPZ8NcZdbCoQXsn Nw+2bkcJ01Ym172rZOBiixGSb/NIomAqwpwBcExDYzBoLnOdnXGYHI2Pgid1UZOvchwDY2HY+ DbBOon79RtK8sXG0NmnUZZe0OIa0porRVDDl4LbLKAfK/bKPXdWcQqST/1uYc8aWOvS4/R6Cd wZtG5F+kSXz2cv2ttZDj47xyF+OIf4R33cN0rPxLXHFZNo6BhfCFxUFAYMKgDziEH23JeMqX0 CWKtoXGD42R7/oBJ03OQqsUXcNoLNYcmYl2d5oxkK1kUbbgmYZaRgVAMtdI+oODnfi2jrcLYC e1HjFcyzbW5W+D6YRijVK4/rzb3Is8RSyJtmcfEwK1c7WDb09oApQzUjDUo/fchNVKXtVFEBk QLkFX+7fmF3ZlHlYsyb1Th7G1evoDhcgSlrS2aw== X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean The MAIXDUINO runs fine with the sipeed_maix_bitm_defconfig but a different board id parameter should be passed to kflash. Signed-off-by: Heinrich Schuchardt Reviewed-by: Sean Anderson --- v2: describe why we use the same defconfig for multiple boards describe how to reset the board via DTR/RTS --- doc/board/sipeed/maix.rst | 75 ++++++++++++++++++++++++++++++++++----- 1 file changed, 66 insertions(+), 9 deletions(-) -- 2.27.0 diff --git a/doc/board/sipeed/maix.rst b/doc/board/sipeed/maix.rst index 06e0008b9f..c235cb44a8 100644 --- a/doc/board/sipeed/maix.rst +++ b/doc/board/sipeed/maix.rst @@ -1,8 +1,8 @@ .. SPDX-License-Identifier: GPL-2.0+ .. Copyright (C) 2020 Sean Anderson -Maix Bit -======== +MAIX +==== Several of the Sipeed Maix series of boards cotain the Kendryte K210 processor, a 64-bit RISC-V CPU. This processor contains several peripherals to accelerate @@ -13,8 +13,10 @@ peripherals include 8M of SRAM (accessible with and without caching); remappable pins, including 40 GPIOs; AES, FFT, and SHA256 accelerators; a DMA controller; and I2C, I2S, and SPI controllers. Maix peripherals vary, but include spi flash; on-board usb-serial bridges; ports for cameras, displays, and sd cards; and -ESP32 chips. Currently, only the Sipeed Maix Bit V2.0 (bitm) is supported, but -the boards are fairly similar. +ESP32 chips. + +Currently, only the Sipeed MAIX BiT V2.0 (bitm) and Sipeed MAIXDUINO are +supported, but the boards are fairly similar. Documentation for Maix boards is available from `Sipeed's website `_. @@ -26,20 +28,42 @@ details are rather lacking, so most technical reference has been taken from the Build and boot steps -------------------- -To build u-boot, run +To build U-Boot, run .. code-block:: none - make sipeed_maix_bitm_defconfig + make make CROSS_COMPILE= -To flash u-boot to a maix bit, run +To flash U-Boot, run .. code-block:: none - kflash -tp /dev/ -B bit_mic u-boot-dtb.bin + kflash -tp /dev/ -B u-boot-dtb.bin + +The board provides two serial devices, e.g. + +* /dev/serial/by-id/usb-Kongou_Hikari_Sipeed-Debug_12345678AB-if00-port0 +* /dev/serial/by-id/usb-Kongou_Hikari_Sipeed-Debug_12345678AB-if01-port0 + +Which one is used for flashing depends on the board. -Boot output should look like the following: +Currently only a small subset of the board features are supported. So we can +use the same default configuration and device tree. In the long run we may need +separate settings. + +======================== ========================== ========== ========== +Board defconfig board_id TTY device +======================== ========================== ========== ========== +Sipeed MAIX BiT sipeed_maix_bitm_defconfig bit first +Sipeed MAIX BiT with Mic sipeed_maix_bitm_defconfig bit_mic first +Sipeed MAIXDUINO sipeed_maix_bitm_defconfig maixduino first +Sipeed MAIX GO goE second +Sipeed MAIX ONE DOCK goD first +======================== ========================== ========== ========== + +Flashing causes a reboot of the device. Parameter -t specifies that the serial +console shall be opened immediately. Boot output should look like the following: .. code-block:: none @@ -238,6 +262,39 @@ Boot Sequence stage. 8. The boot hart jumps to ``0x80000000``. +Resetting the board +^^^^^^^^^^^^^^^^^^^ + +The MAIX boards can be reset using the DTR and RTS lines of the serial console. +How the lines are used depends on the specific board. See the code of kflash.py +for details. + +This is the reset sequence for the MAXDUINO and MAIX BiT with Mic: + +.. code-block:: python + + def reset(self): + self.device.setDTR(False) + self.device.setRTS(False) + time.sleep(0.1) + self.device.setDTR(True) + time.sleep(0.1) + self.device.setDTR(False) + time.sleep(0.1) + +and this for the MAIX Bit: + +.. code-block:: python + + def reset(self): + self.device.setDTR(False) + self.device.setRTS(False) + time.sleep(0.1) + self.device.setRTS(True) + time.sleep(0.1) + self.device.setRTS(False) + time.sleep(0.1) + Memory Map ^^^^^^^^^^