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[73.14.175.90]) by smtp.gmail.com with ESMTPSA id p64sm1808996oih.39.2020.07.26.20.46.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Jul 2020 20:46:26 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Wolfgang Wallner , Bin Meng , Simon Glass Subject: [PATCH v1 53/54] x86: Add a way to add to the e820 memory table Date: Sun, 26 Jul 2020 21:45:25 -0600 Message-Id: <20200726214408.v1.53.I76d2863227979dc3dd80af26759ff2ef51dc5553@changeid> X-Mailer: git-send-email 2.28.0.rc0.142.g3c755180ce-goog In-Reply-To: <20200727034526.1461514-1-sjg@chromium.org> References: <20200727034526.1461514-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Some boards want to reserve extra regions of memory. Add a 'chosen' property to support this. Signed-off-by: Simon Glass --- arch/x86/lib/fsp/fsp_dram.c | 17 +++++++++++++++++ doc/device-tree-bindings/chosen.txt | 18 ++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c index 01d498c21ed..5e0da610b3c 100644 --- a/arch/x86/lib/fsp/fsp_dram.c +++ b/arch/x86/lib/fsp/fsp_dram.c @@ -12,6 +12,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -92,6 +93,8 @@ unsigned int install_e820_map(unsigned int max_entries, unsigned int num_entries = 0; const struct hob_header *hdr; struct hob_res_desc *res_desc; + const fdt64_t *prop; + int size; hdr = gd->arch.hob_list; @@ -133,6 +136,20 @@ unsigned int install_e820_map(unsigned int max_entries, num_entries++; } + prop = ofnode_read_chosen_prop("e820-entries", &size); + if (prop) { + int count = size / (sizeof(u64) * 3); + int i; + + if (num_entries + count >= max_entries) + return -ENOSPC; + for (i = 0; i < count; i++, num_entries++, prop += 3) { + entries[num_entries].addr = fdt64_to_cpu(prop[0]); + entries[num_entries].size = fdt64_to_cpu(prop[1]); + entries[num_entries].type = fdt64_to_cpu(prop[2]); + } + } + return num_entries; } diff --git a/doc/device-tree-bindings/chosen.txt b/doc/device-tree-bindings/chosen.txt index d4dfc05847b..e5ba6720ce1 100644 --- a/doc/device-tree-bindings/chosen.txt +++ b/doc/device-tree-bindings/chosen.txt @@ -143,3 +143,21 @@ This provides the ordering to use when writing device data to the ACPI SSDT node to add. The ACPI information is written in this order. If the ordering does not include all nodes, an error is generated. + +e820-entries +------------ + +This provides a way to add entries to the e820 table which tells the OS about +the memory map. The property contains three sets of 64-bit values: + + address - Start address of region + size - Size of region + flags - Flags (E820_...) + +Example: + +chosen { + e820-entries = /bits/ 64 < + IOMAP_P2SB_BAR IOMAP P2SB_SIZE E820_RESERVED + MCH_BASE_ADDRESS MCH_SIZE E820_RESERVED>; +};