From patchwork Fri Jul 24 10:08:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Roese X-Patchwork-Id: 1335562 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.a=rsa-sha256 header.s=phobos-20191101 header.b=PJLsPcZr; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4BClMT0mrwz9sRK for ; Fri, 24 Jul 2020 20:10:45 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 26E94821F7; Fri, 24 Jul 2020 12:10:06 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1595585407; bh=aDT8Gc7VIrbjmQaHYisgRLyXS7iT7vk5sQ1Vjm73lA8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=PJLsPcZrAPzugK2KnosRBHKrGla/3GBQiAxx9gtk90o7Z3ZA9YmD1CCuKjGnzRPSP a8AAIyIwTAPh/aGk1seqw5vPBjeBZ46Ic4b6t+/xbDF/X4a9LLep6xVuwu6k0fAjU8 bnITdOAjMucX93+kNzWOzuH3pnfTvl96rsbsBYu8Su3hCMPy48DHoc4Yk075lEfVLO ptJQi8v0kmVM3B/3QBTMTDFoOS9h4bdaMhbGnpVQsg6aF4IWa2XDhznsyh2xtNvq6S zMLgSzrhK2W5mfpkmsHuXiBess3vLZkjGBihSOyhGSixBkZdF9r3K76rzAHxLNC7Og oxNAJfndL7dmw== Received: by phobos.denx.de (Postfix, from userid 109) id 75B79821DE; Fri, 24 Jul 2020 12:09:32 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,KHOP_HELO_FCRDNS, SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from mx2.mailbox.org (mx2a.mailbox.org [IPv6:2001:67c:2050:104:0:2:25:2]) (using TLSv1.2 with cipher ECDHE-RSA-CHACHA20-POLY1305 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 47220821BF for ; Fri, 24 Jul 2020 12:09:03 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=sr@denx.de Received: from smtp2.mailbox.org (smtp2.mailbox.org [80.241.60.241]) (using TLSv1.2 with cipher ECDHE-RSA-CHACHA20-POLY1305 (256/256 bits)) (No client certificate requested) by mx2.mailbox.org (Postfix) with ESMTPS id 0AAD8A1B14; Fri, 24 Jul 2020 12:09:02 +0200 (CEST) Received: from smtp2.mailbox.org ([80.241.60.241]) by hefe.heinlein-support.de (hefe.heinlein-support.de [91.198.250.172]) (amavisd-new, port 10030) with ESMTP id iUFytVB6sfxU; Fri, 24 Jul 2020 12:08:58 +0200 (CEST) From: Stefan Roese To: u-boot@lists.denx.de Cc: trini@konsulko.com, sgarapati@marvell.com, awilliams@marvell.com, sjg@chromium.org, cchavva@marvell.com, Bin Meng , Thierry Reding , Marek Vasut Subject: [PATCH v1 03/24] pci: pci-uclass: Dynamically allocate the PCI regions Date: Fri, 24 Jul 2020 12:08:35 +0200 Message-Id: <20200724100856.1482324-4-sr@denx.de> In-Reply-To: <20200724100856.1482324-1-sr@denx.de> References: <20200724100856.1482324-1-sr@denx.de> MIME-Version: 1.0 X-MBO-SPAM-Probability: 23 X-Rspamd-Score: 3.49 / 15.00 / 15.00 X-Rspamd-Queue-Id: A49E817A2 X-Rspamd-UID: d25aac X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Instead of using a fixed length pre-allocated array of regions, this patch moves to dynamically allocating the regions based on the number of available regions plus the necessary regions for DRAM banks. Since MAX_PCI_REGIONS is not needed any more, its removed completely with this patch. Signed-off-by: Stefan Roese Cc: Simon Glass Cc: Bin Meng Cc: Thierry Reding Cc: Marek Vasut --- Changes in v1: - New patch, replaces increase of MAX_PCI_REGIONS to 10 board/renesas/rcar-common/common.c | 10 +++++----- drivers/pci/pci-uclass.c | 14 ++++++++------ include/pci.h | 4 +--- 3 files changed, 14 insertions(+), 14 deletions(-) diff --git a/board/renesas/rcar-common/common.c b/board/renesas/rcar-common/common.c index 83dd288847..83440c11ef 100644 --- a/board/renesas/rcar-common/common.c +++ b/board/renesas/rcar-common/common.c @@ -58,12 +58,12 @@ int ft_board_setup(void *blob, struct bd_info *bd) uclass_foreach_dev(dev, uc) { struct pci_controller hose = { 0 }; - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { - if (hose.region_count == MAX_PCI_REGIONS) { - printf("maximum number of regions parsed, aborting\n"); - break; - } + /* Dynamically allocate the regions array */ + hose.regions = (struct pci_region *) + calloc(1, CONFIG_NR_DRAM_BANKS * + sizeof(struct pci_region)); + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { if (bd->bi_dram[i].size) { pci_set_region(&hose.regions[hose.region_count++], bd->bi_dram[i].start, diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 69fb46d3f4..0fbbef70c8 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -874,6 +874,7 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, struct bd_info *bd = gd->bd; int cells_per_record; const u32 *prop; + int max_regions; int len; int i; @@ -893,7 +894,13 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, hose->region_count = 0; debug("%s: len=%d, cells_per_record=%d\n", __func__, len, cells_per_record); - for (i = 0; i < MAX_PCI_REGIONS; i++, len -= cells_per_record) { + + /* Dynamically allocate the regions array */ + max_regions = len / cells_per_record + CONFIG_NR_DRAM_BANKS; + hose->regions = (struct pci_region *) + calloc(1, max_regions * sizeof(struct pci_region)); + + for (i = 0; i < max_regions; i++, len -= cells_per_record) { u64 pci_addr, addr, size; int space_code; u32 flags; @@ -943,11 +950,6 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, return; for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { - if (hose->region_count == MAX_PCI_REGIONS) { - pr_err("maximum number of regions parsed, aborting\n"); - break; - } - if (bd->bi_dram[i].size) { pci_set_region(hose->regions + hose->region_count++, bd->bi_dram[i].start, diff --git a/include/pci.h b/include/pci.h index 281f353916..53f1386fd4 100644 --- a/include/pci.h +++ b/include/pci.h @@ -590,8 +590,6 @@ extern void pci_cfgfunc_do_nothing(struct pci_controller* hose, pci_dev_t dev, extern void pci_cfgfunc_config_device(struct pci_controller* hose, pci_dev_t dev, struct pci_config_table *); -#define MAX_PCI_REGIONS 7 - #define INDIRECT_TYPE_NO_PCIE_LINK 1 /** @@ -632,7 +630,7 @@ struct pci_controller { * for PCI controllers and a separate UCLASS (or perhaps * UCLASS_PCI_GENERIC) is used for bridges. */ - struct pci_region regions[MAX_PCI_REGIONS]; + struct pci_region *regions; int region_count; struct pci_config_table *config_table;