diff mbox series

[v1,02/24] pci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always set

Message ID 20200724100856.1482324-3-sr@denx.de
State Superseded
Delegated to: Stefan Roese
Headers show
Series arm: Introduce Marvell/Cavium OcteonTX/TX2 | expand

Commit Message

Stefan Roese July 24, 2020, 10:08 a.m. UTC 
Since the migration to Kconfig, CONFIG_NR_DRAM_BANKS is configured for
all boards. Hence we can remove the conditional compilation and the code
path that will never get compiled.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>

---

Changes in v1:
- New patch

 drivers/pci/pci-uclass.c | 17 +----------------
 1 file changed, 1 insertion(+), 16 deletions(-)

Comments

Simon Glass July 28, 2020, 7:01 p.m. UTC | #1 
Hi Stefan,

On Fri, 24 Jul 2020 at 04:09, Stefan Roese <sr@denx.de> wrote:
>
> Since the migration to Kconfig, CONFIG_NR_DRAM_BANKS is configured for
> all boards. Hence we can remove the conditional compilation and the code
> path that will never get compiled.
>
> Signed-off-by: Stefan Roese <sr@denx.de>
> Cc: Tom Rini <trini@konsulko.com>
> Cc: Simon Glass <sjg@chromium.org>
> Cc: Bin Meng <bmeng.cn@gmail.com>
>
> ---
>
> Changes in v1:
> - New patch
>
>  drivers/pci/pci-uclass.c | 17 +----------------
>  1 file changed, 1 insertion(+), 16 deletions(-)
>

Reviewed-by: Simon Glass <sjg@chromium.org>
diff mbox series

Patch

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 834526c5a4..69fb46d3f4 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -871,6 +871,7 @@  static void decode_regions(struct pci_controller *hose, ofnode parent_node,
 			   ofnode node)
 {
 	int pci_addr_cells, addr_cells, size_cells;
+	struct bd_info *bd = gd->bd;
 	int cells_per_record;
 	const u32 *prop;
 	int len;
@@ -938,9 +939,6 @@  static void decode_regions(struct pci_controller *hose, ofnode parent_node,
 	}
 
 	/* Add a region for our local memory */
-#ifdef CONFIG_NR_DRAM_BANKS
-	struct bd_info *bd = gd->bd;
-
 	if (!bd)
 		return;
 
@@ -958,19 +956,6 @@  static void decode_regions(struct pci_controller *hose, ofnode parent_node,
 				       PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
 		}
 	}
-#else
-	phys_addr_t base = 0, size;
-
-	size = gd->ram_size;
-#ifdef CONFIG_SYS_SDRAM_BASE
-	base = CONFIG_SYS_SDRAM_BASE;
-#endif
-	if (gd->pci_ram_top && gd->pci_ram_top < base + size)
-		size = gd->pci_ram_top - base;
-	if (size)
-		pci_set_region(hose->regions + hose->region_count++, base,
-			base, size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
-#endif
 
 	return;
 }