[6/8] arm: dts: Sync the sun50i-a64.dtsi from Linux 5.8-rc1

Sync the Allwinner A64 sun50i-a64.dtsi from Linux.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
 arch/arm/dts/sun50i-a64.dtsi | 532 ++++++++++++++++++++++++++++-------
 1 file changed, 434 insertions(+), 98 deletions(-)

On 22/07/2020 15:18, Peter Robinson wrote:
> Sync the Allwinner A64 sun50i-a64.dtsi from Linux.

Hi Peter,

thanks for your series!

While this looks mostly straight-forward, the problem is that this patch
here affects all Allwinner boards. And for them it breaks older kernels,
which cannot cope with some of the changed bindings or nodes.
Your patches up until here are fine, since they only add nodes and
properties, but this update changes nodes, some in a non-compatible way.

Examples are dropping the "syscon" compatible (which requires 4.18 to
know about the new compatible string) and the dropping of
internal-osc-clk and the connected RTC change. This breaks any kernels
that don't know about the third RTC clock (<&rtc 2>) or the new
compatible string (introduced in 4.20). Similar effects show up in other
OSes.

I was experimenting with some small changes (compared to mainline) to
overcome those issues, mostly by *adding* compatible strings instead of
*replacing* them.

So I would like to ask for a few days so that I can do more testing with
various kernels. I would then post those changes, so that we can discuss
them.

Cheers,
Andre

> 
> Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
> ---
>  arch/arm/dts/sun50i-a64.dtsi | 532 ++++++++++++++++++++++++++++-------
>  1 file changed, 434 insertions(+), 98 deletions(-)
> 
> diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi
> index ff41abc96a..8dfbcd1440 100644
> --- a/arch/arm/dts/sun50i-a64.dtsi
> +++ b/arch/arm/dts/sun50i-a64.dtsi
> @@ -1,46 +1,7 @@
> -/*
> - * Copyright (C) 2016 ARM Ltd.
> - * based on the Allwinner H3 dtsi:
> - *    Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
> - *
> - * This file is dual-licensed: you can use it either under the terms
> - * of the GPL or the X11 license, at your option. Note that this dual
> - * licensing only applies to this file, and not this project as a
> - * whole.
> - *
> - *  a) This file is free software; you can redistribute it and/or
> - *     modify it under the terms of the GNU General Public License as
> - *     published by the Free Software Foundation; either version 2 of the
> - *     License, or (at your option) any later version.
> - *
> - *     This file is distributed in the hope that it will be useful,
> - *     but WITHOUT ANY WARRANTY; without even the implied warranty of
> - *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> - *     GNU General Public License for more details.
> - *
> - * Or, alternatively,
> - *
> - *  b) Permission is hereby granted, free of charge, to any person
> - *     obtaining a copy of this software and associated documentation
> - *     files (the "Software"), to deal in the Software without
> - *     restriction, including without limitation the rights to use,
> - *     copy, modify, merge, publish, distribute, sublicense, and/or
> - *     sell copies of the Software, and to permit persons to whom the
> - *     Software is furnished to do so, subject to the following
> - *     conditions:
> - *
> - *     The above copyright notice and this permission notice shall be
> - *     included in all copies or substantial portions of the Software.
> - *
> - *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> - *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> - *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> - *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> - *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> - *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> - *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> - *     OTHER DEALINGS IN THE SOFTWARE.
> - */
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +// Copyright (C) 2016 ARM Ltd.
> +// based on the Allwinner H3 dtsi:
> +//    Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
>  
>  #include <dt-bindings/clock/sun50i-a64-ccu.h>
>  #include <dt-bindings/clock/sun8i-de2.h>
> @@ -49,6 +10,7 @@
>  #include <dt-bindings/reset/sun50i-a64-ccu.h>
>  #include <dt-bindings/reset/sun8i-de2.h>
>  #include <dt-bindings/reset/sun8i-r-ccu.h>
> +#include <dt-bindings/thermal/thermal.h>
>  
>  / {
>  	interrupt-parent = <&gic>;
> @@ -84,35 +46,47 @@
>  		#size-cells = <0>;
>  
>  		cpu0: cpu@0 {
> -			compatible = "arm,cortex-a53", "arm,armv8";
> +			compatible = "arm,cortex-a53";
>  			device_type = "cpu";
>  			reg = <0>;
>  			enable-method = "psci";
>  			next-level-cache = <&L2>;
> +			clocks = <&ccu 21>;
> +			clock-names = "cpu";
> +			#cooling-cells = <2>;
>  		};
>  
>  		cpu1: cpu@1 {
> -			compatible = "arm,cortex-a53", "arm,armv8";
> +			compatible = "arm,cortex-a53";
>  			device_type = "cpu";
>  			reg = <1>;
>  			enable-method = "psci";
>  			next-level-cache = <&L2>;
> +			clocks = <&ccu 21>;
> +			clock-names = "cpu";
> +			#cooling-cells = <2>;
>  		};
>  
>  		cpu2: cpu@2 {
> -			compatible = "arm,cortex-a53", "arm,armv8";
> +			compatible = "arm,cortex-a53";
>  			device_type = "cpu";
>  			reg = <2>;
>  			enable-method = "psci";
>  			next-level-cache = <&L2>;
> +			clocks = <&ccu 21>;
> +			clock-names = "cpu";
> +			#cooling-cells = <2>;
>  		};
>  
>  		cpu3: cpu@3 {
> -			compatible = "arm,cortex-a53", "arm,armv8";
> +			compatible = "arm,cortex-a53";
>  			device_type = "cpu";
>  			reg = <3>;
>  			enable-method = "psci";
>  			next-level-cache = <&L2>;
> +			clocks = <&ccu 21>;
> +			clock-names = "cpu";
> +			#cooling-cells = <2>;
>  		};
>  
>  		L2: l2-cache {
> @@ -139,15 +113,16 @@
>  		#clock-cells = <0>;
>  		compatible = "fixed-clock";
>  		clock-frequency = <32768>;
> -		clock-output-names = "osc32k";
> +		clock-output-names = "ext-osc32k";
>  	};
>  
> -	iosc: internal-osc-clk {
> -		#clock-cells = <0>;
> -		compatible = "fixed-clock";
> -		clock-frequency = <16000000>;
> -		clock-accuracy = <300000000>;
> -		clock-output-names = "iosc";
> +	pmu {
> +		compatible = "arm,cortex-a53-pmu";
> +		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
> +			     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
> +			     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
> +			     <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
>  	};
>  
>  	psci {
> @@ -155,26 +130,33 @@
>  		method = "smc";
>  	};
>  
> -	sound_spdif {
> +	sound: sound {
>  		compatible = "simple-audio-card";
> -		simple-audio-card,name = "On-board SPDIF";
> +		simple-audio-card,name = "sun50i-a64-audio";
> +		simple-audio-card,format = "i2s";
> +		simple-audio-card,frame-master = <&cpudai>;
> +		simple-audio-card,bitclock-master = <&cpudai>;
> +		simple-audio-card,mclk-fs = <128>;
> +		simple-audio-card,aux-devs = <&codec_analog>;
> +		simple-audio-card,routing =
> +				"Left DAC", "AIF1 Slot 0 Left",
> +				"Right DAC", "AIF1 Slot 0 Right",
> +				"AIF1 Slot 0 Left ADC", "Left ADC",
> +				"AIF1 Slot 0 Right ADC", "Right ADC";
> +		status = "disabled";
>  
> -		simple-audio-card,cpu {
> -			sound-dai = <&spdif>;
> +		cpudai: simple-audio-card,cpu {
> +			sound-dai = <&dai>;
>  		};
>  
> -		simple-audio-card,codec {
> -			sound-dai = <&spdif_out>;
> +		link_codec: simple-audio-card,codec {
> +			sound-dai = <&codec>;
>  		};
>  	};
>  
> -	spdif_out: spdif-out {
> -		#sound-dai-cells = <0>;
> -		compatible = "linux,spdif-dit";
> -	};
> -
>  	timer {
>  		compatible = "arm,armv8-timer";
> +		allwinner,erratum-unknown1;
>  		interrupts = <GIC_PPI 13
>  			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
>  			     <GIC_PPI 14
> @@ -185,13 +167,76 @@
>  			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
>  	};
>  
> +	thermal-zones {
> +		cpu_thermal: cpu0-thermal {
> +			/* milliseconds */
> +			polling-delay-passive = <0>;
> +			polling-delay = <0>;
> +			thermal-sensors = <&ths 0>;
> +
> +			cooling-maps {
> +				map0 {
> +					trip = <&cpu_alert0>;
> +					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +				};
> +				map1 {
> +					trip = <&cpu_alert1>;
> +					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +				};
> +			};
> +
> +			trips {
> +				cpu_alert0: cpu_alert0 {
> +					/* milliCelsius */
> +					temperature = <75000>;
> +					hysteresis = <2000>;
> +					type = "passive";
> +				};
> +
> +				cpu_alert1: cpu_alert1 {
> +					/* milliCelsius */
> +					temperature = <90000>;
> +					hysteresis = <2000>;
> +					type = "hot";
> +				};
> +
> +				cpu_crit: cpu_crit {
> +					/* milliCelsius */
> +					temperature = <110000>;
> +					hysteresis = <2000>;
> +					type = "critical";
> +				};
> +			};
> +		};
> +
> +		gpu0_thermal: gpu0-thermal {
> +			/* milliseconds */
> +			polling-delay-passive = <0>;
> +			polling-delay = <0>;
> +			thermal-sensors = <&ths 1>;
> +		};
> +
> +		gpu1_thermal: gpu1-thermal {
> +			/* milliseconds */
> +			polling-delay-passive = <0>;
> +			polling-delay = <0>;
> +			thermal-sensors = <&ths 2>;
> +		};
> +	};
> +
>  	soc {
>  		compatible = "simple-bus";
>  		#address-cells = <1>;
>  		#size-cells = <1>;
>  		ranges;
>  
> -		de2@1000000 {
> +		bus@1000000 {
>  			compatible = "allwinner,sun50i-a64-de2";
>  			reg = <0x1000000 0x400000>;
>  			allwinner,sram = <&de2_sram 1>;
> @@ -201,16 +246,28 @@
>  
>  			display_clocks: clock@0 {
>  				compatible = "allwinner,sun50i-a64-de2-clk";
> -				reg = <0x0 0x100000>;
> -				clocks = <&ccu CLK_DE>,
> -					 <&ccu CLK_BUS_DE>;
> -				clock-names = "mod",
> -					      "bus";
> +				reg = <0x0 0x10000>;
> +				clocks = <&ccu CLK_BUS_DE>,
> +					 <&ccu CLK_DE>;
> +				clock-names = "bus",
> +					      "mod";
>  				resets = <&ccu RST_BUS_DE>;
>  				#clock-cells = <1>;
>  				#reset-cells = <1>;
>  			};
>  
> +			rotate: rotate@20000 {
> +				compatible = "allwinner,sun50i-a64-de2-rotate",
> +					     "allwinner,sun8i-a83t-de2-rotate";
> +				reg = <0x20000 0x10000>;
> +				interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&display_clocks CLK_BUS_ROT>,
> +					 <&display_clocks CLK_ROT>;
> +				clock-names = "bus",
> +					      "mod";
> +				resets = <&display_clocks RST_ROT>;
> +			};
> +
>  			mixer0: mixer@100000 {
>  				compatible = "allwinner,sun50i-a64-de2-mixer-0";
>  				reg = <0x100000 0x100000>;
> @@ -225,11 +282,19 @@
>  					#size-cells = <0>;
>  
>  					mixer0_out: port@1 {
> +						#address-cells = <1>;
> +						#size-cells = <0>;
>  						reg = <1>;
>  
> -						mixer0_out_tcon0: endpoint {
> +						mixer0_out_tcon0: endpoint@0 {
> +							reg = <0>;
>  							remote-endpoint = <&tcon0_in_mixer0>;
>  						};
> +
> +						mixer0_out_tcon1: endpoint@1 {
> +							reg = <1>;
> +							remote-endpoint = <&tcon1_in_mixer0>;
> +						};
>  					};
>  				};
>  			};
> @@ -248,9 +313,17 @@
>  					#size-cells = <0>;
>  
>  					mixer1_out: port@1 {
> +						#address-cells = <1>;
> +						#size-cells = <0>;
>  						reg = <1>;
>  
> -						mixer1_out_tcon1: endpoint {
> +						mixer1_out_tcon0: endpoint@0 {
> +							reg = <0>;
> +							remote-endpoint = <&tcon0_in_mixer1>;
> +						};
> +
> +						mixer1_out_tcon1: endpoint@1 {
> +							reg = <1>;
>  							remote-endpoint = <&tcon1_in_mixer1>;
>  						};
>  					};
> @@ -259,8 +332,7 @@
>  		};
>  
>  		syscon: syscon@1c00000 {
> -			compatible = "allwinner,sun50i-a64-system-control",
> -				"syscon";
> +			compatible = "allwinner,sun50i-a64-system-control";
>  			reg = <0x01c00000 0x1000>;
>  			#address-cells = <1>;
>  			#size-cells = <1>;
> @@ -278,6 +350,20 @@
>  					reg = <0x0000 0x28000>;
>  				};
>  			};
> +
> +			sram_c1: sram@1d00000 {
> +				compatible = "mmio-sram";
> +				reg = <0x01d00000 0x40000>;
> +				#address-cells = <1>;
> +				#size-cells = <1>;
> +				ranges = <0 0x01d00000 0x40000>;
> +
> +				ve_sram: sram-section@0 {
> +					compatible = "allwinner,sun50i-a64-sram-c1",
> +						     "allwinner,sun4i-a10-sram-c1";
> +					reg = <0x000000 0x40000>;
> +				};
> +			};
>  		};
>  
>  		dma: dma-controller@1c02000 {
> @@ -299,6 +385,7 @@
>  			clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
>  			clock-names = "ahb", "tcon-ch0";
>  			clock-output-names = "tcon-pixel-clock";
> +			#clock-cells = <0>;
>  			resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>;
>  			reset-names = "lcd", "lvds";
>  
> @@ -315,12 +402,23 @@
>  						reg = <0>;
>  						remote-endpoint = <&mixer0_out_tcon0>;
>  					};
> +
> +					tcon0_in_mixer1: endpoint@1 {
> +						reg = <1>;
> +						remote-endpoint = <&mixer1_out_tcon0>;
> +					};
>  				};
>  
>  				tcon0_out: port@1 {
>  					#address-cells = <1>;
>  					#size-cells = <0>;
>  					reg = <1>;
> +
> +					tcon0_out_dsi: endpoint@1 {
> +						reg = <1>;
> +						remote-endpoint = <&dsi_in_tcon0>;
> +						allwinner,tcon-channel = <1>;
> +					};
>  				};
>  			};
>  		};
> @@ -340,9 +438,17 @@
>  				#size-cells = <0>;
>  
>  				tcon1_in: port@0 {
> +					#address-cells = <1>;
> +					#size-cells = <0>;
>  					reg = <0>;
>  
> -					tcon1_in_mixer1: endpoint {
> +					tcon1_in_mixer0: endpoint@0 {
> +						reg = <0>;
> +						remote-endpoint = <&mixer0_out_tcon1>;
> +					};
> +
> +					tcon1_in_mixer1: endpoint@1 {
> +						reg = <1>;
>  						remote-endpoint = <&mixer1_out_tcon1>;
>  					};
>  				};
> @@ -360,6 +466,17 @@
>  			};
>  		};
>  
> +		video-codec@1c0e000 {
> +			compatible = "allwinner,sun50i-a64-video-engine";
> +			reg = <0x01c0e000 0x1000>;
> +			clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
> +				 <&ccu CLK_DRAM_VE>;
> +			clock-names = "ahb", "mod", "ram";
> +			resets = <&ccu RST_BUS_VE>;
> +			interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
> +			allwinner,sram = <&ve_sram 1>;
> +		};
> +
>  		mmc0: mmc@1c0f000 {
>  			compatible = "allwinner,sun50i-a64-mmc";
>  			reg = <0x01c0f000 0x1000>;
> @@ -405,6 +522,31 @@
>  		sid: eeprom@1c14000 {
>  			compatible = "allwinner,sun50i-a64-sid";
>  			reg = <0x1c14000 0x400>;
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +
> +			ths_calibration: thermal-sensor-calibration@34 {
> +				reg = <0x34 0x8>;
> +			};
> +		};
> +
> +		crypto: crypto@1c15000 {
> +			compatible = "allwinner,sun50i-a64-crypto";
> +			reg = <0x01c15000 0x1000>;
> +			interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
> +			clock-names = "bus", "mod";
> +			resets = <&ccu RST_BUS_CE>;
> +		};
> +
> +		msgbox: mailbox@1c17000 {
> +			compatible = "allwinner,sun50i-a64-msgbox",
> +				     "allwinner,sun6i-a31-msgbox";
> +			reg = <0x01c17000 0x1000>;
> +			clocks = <&ccu CLK_BUS_MSGBOX>;
> +			resets = <&ccu RST_BUS_MSGBOX>;
> +			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> +			#mbox-cells = <1>;
>  		};
>  
>  		usb_otg: usb@1c19000 {
> @@ -417,6 +559,7 @@
>  			phys = <&usbphy 0>;
>  			phy-names = "usb";
>  			extcon = <&usbphy 0>;
> +			dr_mode = "otg";
>  			status = "disabled";
>  		};
>  
> @@ -491,7 +634,7 @@
>  		ccu: clock@1c20000 {
>  			compatible = "allwinner,sun50i-a64-ccu";
>  			reg = <0x01c20000 0x400>;
> -			clocks = <&osc24M>, <&osc32k>;
> +			clocks = <&osc24M>, <&rtc 0>;
>  			clock-names = "hosc", "losc";
>  			#clock-cells = <1>;
>  			#reset-cells = <1>;
> @@ -503,22 +646,50 @@
>  			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
>  				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
>  				     <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> -			clocks = <&ccu 58>;
> +			clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
> +			clock-names = "apb", "hosc", "losc";
>  			gpio-controller;
>  			#gpio-cells = <3>;
>  			interrupt-controller;
>  			#interrupt-cells = <3>;
>  
> -			i2c0_pins: i2c0_pins {
> +			csi_pins: csi-pins {
> +				pins = "PE0", "PE2", "PE3", "PE4", "PE5", "PE6",
> +				       "PE7", "PE8", "PE9", "PE10", "PE11";
> +				function = "csi";
> +			};
> +
> +			/omit-if-no-ref/
> +			csi_mclk_pin: csi-mclk-pin {
> +				pins = "PE1";
> +				function = "csi";
> +			};
> +
> +			i2c0_pins: i2c0-pins {
>  				pins = "PH0", "PH1";
>  				function = "i2c0";
>  			};
>  
> -			i2c1_pins: i2c1_pins {
> +			i2c1_pins: i2c1-pins {
>  				pins = "PH2", "PH3";
>  				function = "i2c1";
>  			};
>  
> +			i2c2_pins: i2c2-pins {
> +				pins = "PE14", "PE15";
> +				function = "i2c2";
> +			};
> +
> +			/omit-if-no-ref/
> +			lcd_rgb666_pins: lcd-rgb666-pins {
> +				pins = "PD0", "PD1", "PD2", "PD3", "PD4",
> +				       "PD5", "PD6", "PD7", "PD8", "PD9",
> +				       "PD10", "PD11", "PD12", "PD13",
> +				       "PD14", "PD15", "PD16", "PD17",
> +				       "PD18", "PD19", "PD20", "PD21";
> +				function = "lcd0";
> +			};
> +
>  			mmc0_pins: mmc0-pins {
>  				pins = "PF0", "PF1", "PF2", "PF3",
>  				       "PF4", "PF5";
> @@ -551,19 +722,19 @@
>  				bias-pull-up;
>  			};
>  
> -			pwm_pin: pwm_pin {
> +			pwm_pin: pwm-pin {
>  				pins = "PD22";
>  				function = "pwm";
>  			};
>  
> -			rmii_pins: rmii_pins {
> +			rmii_pins: rmii-pins {
>  				pins = "PD10", "PD11", "PD13", "PD14", "PD17",
>  				       "PD18", "PD19", "PD20", "PD22", "PD23";
>  				function = "emac";
>  				drive-strength = <40>;
>  			};
>  
> -			rgmii_pins: rgmii_pins {
> +			rgmii_pins: rgmii-pins {
>  				pins = "PD8", "PD9", "PD10", "PD11", "PD12",
>  				       "PD13", "PD15", "PD16", "PD17", "PD18",
>  				       "PD19", "PD20", "PD21", "PD22", "PD23";
> @@ -571,17 +742,17 @@
>  				drive-strength = <40>;
>  			};
>  
> -			spdif_tx_pin: spdif {
> +			spdif_tx_pin: spdif-tx-pin {
>  				pins = "PH8";
>  				function = "spdif";
>  			};
>  
> -			spi0_pins: spi0 {
> +			spi0_pins: spi0-pins {
>  				pins = "PC0", "PC1", "PC2", "PC3";
>  				function = "spi0";
>  			};
>  
> -			spi1_pins: spi1 {
> +			spi1_pins: spi1-pins {
>  				pins = "PD0", "PD1", "PD2", "PD3";
>  				function = "spi1";
>  			};
> @@ -591,12 +762,12 @@
>  				function = "uart0";
>  			};
>  
> -			uart1_pins: uart1_pins {
> +			uart1_pins: uart1-pins {
>  				pins = "PG6", "PG7";
>  				function = "uart1";
>  			};
>  
> -			uart1_rts_cts_pins: uart1_rts_cts_pins {
> +			uart1_rts_cts_pins: uart1-rts-cts-pins {
>  				pins = "PG8", "PG9";
>  				function = "uart1";
>  			};
> @@ -638,6 +809,14 @@
>  			status = "disabled";
>  		};
>  
> +		lradc: lradc@1c21800 {
> +			compatible = "allwinner,sun50i-a64-lradc",
> +				     "allwinner,sun8i-a83t-r-lradc";
> +			reg = <0x01c21800 0x400>;
> +			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> +			status = "disabled";
> +		};
> +
>  		i2s0: i2s@1c22000 {
>  			#sound-dai-cells = <0>;
>  			compatible = "allwinner,sun50i-a64-i2s",
> @@ -666,6 +845,41 @@
>  			status = "disabled";
>  		};
>  
> +		dai: dai@1c22c00 {
> +			#sound-dai-cells = <0>;
> +			compatible = "allwinner,sun50i-a64-codec-i2s";
> +			reg = <0x01c22c00 0x200>;
> +			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
> +			clock-names = "apb", "mod";
> +			resets = <&ccu RST_BUS_CODEC>;
> +			dmas = <&dma 15>, <&dma 15>;
> +			dma-names = "rx", "tx";
> +			status = "disabled";
> +		};
> +
> +		codec: codec@1c22e00 {
> +			#sound-dai-cells = <0>;
> +			compatible = "allwinner,sun8i-a33-codec";
> +			reg = <0x01c22e00 0x600>;
> +			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
> +			clock-names = "bus", "mod";
> +			status = "disabled";
> +		};
> +
> +		ths: thermal-sensor@1c25000 {
> +			compatible = "allwinner,sun50i-a64-ths";
> +			reg = <0x01c25000 0x100>;
> +			clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
> +			clock-names = "bus", "mod";
> +			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> +			resets = <&ccu RST_BUS_THS>;
> +			nvmem-cells = <&ths_calibration>;
> +			nvmem-cell-names = "calibration";
> +			#thermal-sensor-cells = <1>;
> +		};
> +
>  		uart0: serial@1c28000 {
>  			compatible = "snps,dw-apb-uart";
>  			reg = <0x01c28000 0x400>;
> @@ -727,6 +941,8 @@
>  			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&ccu CLK_BUS_I2C0>;
>  			resets = <&ccu RST_BUS_I2C0>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&i2c0_pins>;
>  			status = "disabled";
>  			#address-cells = <1>;
>  			#size-cells = <0>;
> @@ -738,6 +954,8 @@
>  			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&ccu CLK_BUS_I2C1>;
>  			resets = <&ccu RST_BUS_I2C1>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&i2c1_pins>;
>  			status = "disabled";
>  			#address-cells = <1>;
>  			#size-cells = <0>;
> @@ -749,12 +967,13 @@
>  			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&ccu CLK_BUS_I2C2>;
>  			resets = <&ccu RST_BUS_I2C2>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&i2c2_pins>;
>  			status = "disabled";
>  			#address-cells = <1>;
>  			#size-cells = <0>;
>  		};
>  
> -
>  		spi0: spi@1c68000 {
>  			compatible = "allwinner,sun8i-h3-spi";
>  			reg = <0x01c68000 0x1000>;
> @@ -808,6 +1027,28 @@
>  			};
>  		};
>  
> +		mali: gpu@1c40000 {
> +			compatible = "allwinner,sun50i-a64-mali", "arm,mali-400";
> +			reg = <0x01c40000 0x10000>;
> +			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "gp",
> +					  "gpmmu",
> +					  "pp0",
> +					  "ppmmu0",
> +					  "pp1",
> +					  "ppmmu1",
> +					  "pmu";
> +			clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
> +			clock-names = "bus", "core";
> +			resets = <&ccu RST_BUS_GPU>;
> +		};
> +
>  		gic: interrupt-controller@1c81000 {
>  			compatible = "arm,gic-400";
>  			reg = <0x01c81000 0x1000>,
> @@ -830,6 +1071,75 @@
>  			status = "disabled";
>  		};
>  
> +		mbus: dram-controller@1c62000 {
> +			compatible = "allwinner,sun50i-a64-mbus";
> +			reg = <0x01c62000 0x1000>;
> +			clocks = <&ccu 112>;
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			dma-ranges = <0x00000000 0x40000000 0xc0000000>;
> +			#interconnect-cells = <1>;
> +		};
> +
> +		csi: csi@1cb0000 {
> +			compatible = "allwinner,sun50i-a64-csi";
> +			reg = <0x01cb0000 0x1000>;
> +			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&ccu CLK_BUS_CSI>,
> +				 <&ccu CLK_CSI_SCLK>,
> +				 <&ccu CLK_DRAM_CSI>;
> +			clock-names = "bus", "mod", "ram";
> +			resets = <&ccu RST_BUS_CSI>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&csi_pins>;
> +			status = "disabled";
> +		};
> +
> +		dsi: dsi@1ca0000 {
> +			compatible = "allwinner,sun50i-a64-mipi-dsi";
> +			reg = <0x01ca0000 0x1000>;
> +			interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&ccu CLK_BUS_MIPI_DSI>;
> +			resets = <&ccu RST_BUS_MIPI_DSI>;
> +			phys = <&dphy>;
> +			phy-names = "dphy";
> +			status = "disabled";
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			port {
> +				dsi_in_tcon0: endpoint {
> +					remote-endpoint = <&tcon0_out_dsi>;
> +				};
> +			};
> +		};
> +
> +		dphy: d-phy@1ca1000 {
> +			compatible = "allwinner,sun50i-a64-mipi-dphy",
> +				     "allwinner,sun6i-a31-mipi-dphy";
> +			reg = <0x01ca1000 0x1000>;
> +			clocks = <&ccu CLK_BUS_MIPI_DSI>,
> +				 <&ccu CLK_DSI_DPHY>;
> +			clock-names = "bus", "mod";
> +			resets = <&ccu RST_BUS_MIPI_DSI>;
> +			status = "disabled";
> +			#phy-cells = <0>;
> +		};
> +
> +		deinterlace: deinterlace@1e00000 {
> +			compatible = "allwinner,sun50i-a64-deinterlace",
> +				     "allwinner,sun8i-h3-deinterlace";
> +			reg = <0x01e00000 0x20000>;
> +			clocks = <&ccu CLK_BUS_DEINTERLACE>,
> +				 <&ccu CLK_DEINTERLACE>,
> +				 <&ccu CLK_DRAM_DEINTERLACE>;
> +			clock-names = "bus", "mod", "ram";
> +			resets = <&ccu RST_BUS_DEINTERLACE>;
> +			interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
> +			interconnects = <&mbus 9>;
> +			interconnect-names = "dma-mem";
> +		};
> +
>  		hdmi: hdmi@1ee0000 {
>  			compatible = "allwinner,sun50i-a64-dw-hdmi",
>  				     "allwinner,sun8i-a83t-dw-hdmi";
> @@ -842,7 +1152,7 @@
>  			resets = <&ccu RST_BUS_HDMI1>;
>  			reset-names = "ctrl";
>  			phys = <&hdmi_phy>;
> -			phy-names = "hdmi-phy";
> +			phy-names = "phy";
>  			status = "disabled";
>  
>  			ports {
> @@ -867,7 +1177,7 @@
>  			compatible = "allwinner,sun50i-a64-hdmi-phy";
>  			reg = <0x01ef0000 0x10000>;
>  			clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
> -				 <&ccu 7>;
> +				 <&ccu CLK_PLL_VIDEO0>;
>  			clock-names = "bus", "mod", "pll-0";
>  			resets = <&ccu RST_BUS_HDMI0>;
>  			reset-names = "phy";
> @@ -875,11 +1185,12 @@
>  		};
>  
>  		rtc: rtc@1f00000 {
> -			compatible = "allwinner,sun6i-a31-rtc";
> -			reg = <0x01f00000 0x54>;
> +			compatible = "allwinner,sun50i-a64-rtc",
> +				     "allwinner,sun8i-h3-rtc";
> +			reg = <0x01f00000 0x400>;
>  			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
>  				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
> -			clock-output-names = "rtc-osc32k", "rtc-osc32k-out";
> +			clock-output-names = "osc32k", "osc32k-out", "iosc";
>  			clocks = <&osc32k>;
>  			#clock-cells = <1>;
>  		};
> @@ -896,13 +1207,19 @@
>  		r_ccu: clock@1f01400 {
>  			compatible = "allwinner,sun50i-a64-r-ccu";
>  			reg = <0x01f01400 0x100>;
> -			clocks = <&osc24M>, <&osc32k>, <&iosc>,
> -				 <&ccu 11>;
> +			clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
> +				 <&ccu CLK_PLL_PERIPH0>;
>  			clock-names = "hosc", "losc", "iosc", "pll-periph";
>  			#clock-cells = <1>;
>  			#reset-cells = <1>;
>  		};
>  
> +		codec_analog: codec-analog@1f015c0 {
> +			compatible = "allwinner,sun50i-a64-codec-analog";
> +			reg = <0x01f015c0 0x4>;
> +			status = "disabled";
> +		};
> +
>  		r_i2c: i2c@1f02400 {
>  			compatible = "allwinner,sun50i-a64-i2c",
>  				     "allwinner,sun6i-a31-i2c";
> @@ -915,6 +1232,19 @@
>  			#size-cells = <0>;
>  		};
>  
> +		r_ir: ir@1f02000 {
> +			compatible = "allwinner,sun50i-a64-ir",
> +				     "allwinner,sun6i-a31-ir";
> +			reg = <0x01f02000 0x400>;
> +			clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>;
> +			clock-names = "apb", "ir";
> +			resets = <&r_ccu RST_APB0_IR>;
> +			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&r_ir_rx_pin>;
> +			status = "disabled";
> +		};
> +
>  		r_pwm: pwm@1f03800 {
>  			compatible = "allwinner,sun50i-a64-pwm",
>  				     "allwinner,sun5i-a13-pwm";
> @@ -942,12 +1272,17 @@
>  				function = "s_i2c";
>  			};
>  
> -			r_pwm_pin: pwm {
> +			r_ir_rx_pin: r-ir-rx-pin {
> +				pins = "PL11";
> +				function = "s_cir_rx";
> +			};
> +
> +			r_pwm_pin: r-pwm-pin {
>  				pins = "PL10";
>  				function = "s_pwm";
>  			};
>  
> -			r_rsb_pins: rsb {
> +			r_rsb_pins: r-rsb-pins {
>  				pins = "PL0", "PL1";
>  				function = "s_rsb";
>  			};
> @@ -972,6 +1307,7 @@
>  				     "allwinner,sun6i-a31-wdt";
>  			reg = <0x01c20ca0 0x20>;
>  			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&osc24M>;
>  		};
>  	};
>  };
>

On Thu, Jul 23, 2020 at 12:15 AM André Przywara <andre.przywara@arm.com> wrote:
>
> On 22/07/2020 15:18, Peter Robinson wrote:
> > Sync the Allwinner A64 sun50i-a64.dtsi from Linux.
>
> Hi Peter,
>
> thanks for your series!
>
> While this looks mostly straight-forward, the problem is that this patch
> here affects all Allwinner boards. And for them it breaks older kernels,
> which cannot cope with some of the changed bindings or nodes.
> Your patches up until here are fine, since they only add nodes and
> properties, but this update changes nodes, some in a non-compatible way.
>
> Examples are dropping the "syscon" compatible (which requires 4.18 to
> know about the new compatible string) and the dropping of
> internal-osc-clk and the connected RTC change. This breaks any kernels
> that don't know about the third RTC clock (<&rtc 2>) or the new
> compatible string (introduced in 4.20). Similar effects show up in other
> OSes.

The 4.18 kernel is over 2 years old. How many users are going to
actively upgrade U-Boot to the latest and not the kernel all while
using the U-Boot provided DT and not just loading the matching kernel
DT supplied by what ever ancient kernel they happen to choose to use?
I feel this use case is quite a corner case and in those cases they're
probably not using a vanilla upstream U-Boot anyway.

> I was experimenting with some small changes (compared to mainline) to
> overcome those issues, mostly by *adding* compatible strings instead of
> *replacing* them.

Shouldn't they be added to a -u-boot.dtsi?

> So I would like to ask for a few days so that I can do more testing with
> various kernels. I would then post those changes, so that we can discuss
> them.
>
> Cheers,
> Andre
>
> >
> > Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
> > ---
> >  arch/arm/dts/sun50i-a64.dtsi | 532 ++++++++++++++++++++++++++++-------
> >  1 file changed, 434 insertions(+), 98 deletions(-)
> >
> > diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi
> > index ff41abc96a..8dfbcd1440 100644
> > --- a/arch/arm/dts/sun50i-a64.dtsi
> > +++ b/arch/arm/dts/sun50i-a64.dtsi
> > @@ -1,46 +1,7 @@
> > -/*
> > - * Copyright (C) 2016 ARM Ltd.
> > - * based on the Allwinner H3 dtsi:
> > - *    Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
> > - *
> > - * This file is dual-licensed: you can use it either under the terms
> > - * of the GPL or the X11 license, at your option. Note that this dual
> > - * licensing only applies to this file, and not this project as a
> > - * whole.
> > - *
> > - *  a) This file is free software; you can redistribute it and/or
> > - *     modify it under the terms of the GNU General Public License as
> > - *     published by the Free Software Foundation; either version 2 of the
> > - *     License, or (at your option) any later version.
> > - *
> > - *     This file is distributed in the hope that it will be useful,
> > - *     but WITHOUT ANY WARRANTY; without even the implied warranty of
> > - *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > - *     GNU General Public License for more details.
> > - *
> > - * Or, alternatively,
> > - *
> > - *  b) Permission is hereby granted, free of charge, to any person
> > - *     obtaining a copy of this software and associated documentation
> > - *     files (the "Software"), to deal in the Software without
> > - *     restriction, including without limitation the rights to use,
> > - *     copy, modify, merge, publish, distribute, sublicense, and/or
> > - *     sell copies of the Software, and to permit persons to whom the
> > - *     Software is furnished to do so, subject to the following
> > - *     conditions:
> > - *
> > - *     The above copyright notice and this permission notice shall be
> > - *     included in all copies or substantial portions of the Software.
> > - *
> > - *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> > - *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> > - *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> > - *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> > - *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> > - *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> > - *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> > - *     OTHER DEALINGS IN THE SOFTWARE.
> > - */
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +// Copyright (C) 2016 ARM Ltd.
> > +// based on the Allwinner H3 dtsi:
> > +//    Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
> >
> >  #include <dt-bindings/clock/sun50i-a64-ccu.h>
> >  #include <dt-bindings/clock/sun8i-de2.h>
> > @@ -49,6 +10,7 @@
> >  #include <dt-bindings/reset/sun50i-a64-ccu.h>
> >  #include <dt-bindings/reset/sun8i-de2.h>
> >  #include <dt-bindings/reset/sun8i-r-ccu.h>
> > +#include <dt-bindings/thermal/thermal.h>
> >
> >  / {
> >       interrupt-parent = <&gic>;
> > @@ -84,35 +46,47 @@
> >               #size-cells = <0>;
> >
> >               cpu0: cpu@0 {
> > -                     compatible = "arm,cortex-a53", "arm,armv8";
> > +                     compatible = "arm,cortex-a53";
> >                       device_type = "cpu";
> >                       reg = <0>;
> >                       enable-method = "psci";
> >                       next-level-cache = <&L2>;
> > +                     clocks = <&ccu 21>;
> > +                     clock-names = "cpu";
> > +                     #cooling-cells = <2>;
> >               };
> >
> >               cpu1: cpu@1 {
> > -                     compatible = "arm,cortex-a53", "arm,armv8";
> > +                     compatible = "arm,cortex-a53";
> >                       device_type = "cpu";
> >                       reg = <1>;
> >                       enable-method = "psci";
> >                       next-level-cache = <&L2>;
> > +                     clocks = <&ccu 21>;
> > +                     clock-names = "cpu";
> > +                     #cooling-cells = <2>;
> >               };
> >
> >               cpu2: cpu@2 {
> > -                     compatible = "arm,cortex-a53", "arm,armv8";
> > +                     compatible = "arm,cortex-a53";
> >                       device_type = "cpu";
> >                       reg = <2>;
> >                       enable-method = "psci";
> >                       next-level-cache = <&L2>;
> > +                     clocks = <&ccu 21>;
> > +                     clock-names = "cpu";
> > +                     #cooling-cells = <2>;
> >               };
> >
> >               cpu3: cpu@3 {
> > -                     compatible = "arm,cortex-a53", "arm,armv8";
> > +                     compatible = "arm,cortex-a53";
> >                       device_type = "cpu";
> >                       reg = <3>;
> >                       enable-method = "psci";
> >                       next-level-cache = <&L2>;
> > +                     clocks = <&ccu 21>;
> > +                     clock-names = "cpu";
> > +                     #cooling-cells = <2>;
> >               };
> >
> >               L2: l2-cache {
> > @@ -139,15 +113,16 @@
> >               #clock-cells = <0>;
> >               compatible = "fixed-clock";
> >               clock-frequency = <32768>;
> > -             clock-output-names = "osc32k";
> > +             clock-output-names = "ext-osc32k";
> >       };
> >
> > -     iosc: internal-osc-clk {
> > -             #clock-cells = <0>;
> > -             compatible = "fixed-clock";
> > -             clock-frequency = <16000000>;
> > -             clock-accuracy = <300000000>;
> > -             clock-output-names = "iosc";
> > +     pmu {
> > +             compatible = "arm,cortex-a53-pmu";
> > +             interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
> > +                          <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
> > +                          <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
> > +                          <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
> > +             interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
> >       };
> >
> >       psci {
> > @@ -155,26 +130,33 @@
> >               method = "smc";
> >       };
> >
> > -     sound_spdif {
> > +     sound: sound {
> >               compatible = "simple-audio-card";
> > -             simple-audio-card,name = "On-board SPDIF";
> > +             simple-audio-card,name = "sun50i-a64-audio";
> > +             simple-audio-card,format = "i2s";
> > +             simple-audio-card,frame-master = <&cpudai>;
> > +             simple-audio-card,bitclock-master = <&cpudai>;
> > +             simple-audio-card,mclk-fs = <128>;
> > +             simple-audio-card,aux-devs = <&codec_analog>;
> > +             simple-audio-card,routing =
> > +                             "Left DAC", "AIF1 Slot 0 Left",
> > +                             "Right DAC", "AIF1 Slot 0 Right",
> > +                             "AIF1 Slot 0 Left ADC", "Left ADC",
> > +                             "AIF1 Slot 0 Right ADC", "Right ADC";
> > +             status = "disabled";
> >
> > -             simple-audio-card,cpu {
> > -                     sound-dai = <&spdif>;
> > +             cpudai: simple-audio-card,cpu {
> > +                     sound-dai = <&dai>;
> >               };
> >
> > -             simple-audio-card,codec {
> > -                     sound-dai = <&spdif_out>;
> > +             link_codec: simple-audio-card,codec {
> > +                     sound-dai = <&codec>;
> >               };
> >       };
> >
> > -     spdif_out: spdif-out {
> > -             #sound-dai-cells = <0>;
> > -             compatible = "linux,spdif-dit";
> > -     };
> > -
> >       timer {
> >               compatible = "arm,armv8-timer";
> > +             allwinner,erratum-unknown1;
> >               interrupts = <GIC_PPI 13
> >                       (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
> >                            <GIC_PPI 14
> > @@ -185,13 +167,76 @@
> >                       (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> >       };
> >
> > +     thermal-zones {
> > +             cpu_thermal: cpu0-thermal {
> > +                     /* milliseconds */
> > +                     polling-delay-passive = <0>;
> > +                     polling-delay = <0>;
> > +                     thermal-sensors = <&ths 0>;
> > +
> > +                     cooling-maps {
> > +                             map0 {
> > +                                     trip = <&cpu_alert0>;
> > +                                     cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > +                                                      <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > +                                                      <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > +                                                      <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> > +                             };
> > +                             map1 {
> > +                                     trip = <&cpu_alert1>;
> > +                                     cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > +                                                      <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > +                                                      <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > +                                                      <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> > +                             };
> > +                     };
> > +
> > +                     trips {
> > +                             cpu_alert0: cpu_alert0 {
> > +                                     /* milliCelsius */
> > +                                     temperature = <75000>;
> > +                                     hysteresis = <2000>;
> > +                                     type = "passive";
> > +                             };
> > +
> > +                             cpu_alert1: cpu_alert1 {
> > +                                     /* milliCelsius */
> > +                                     temperature = <90000>;
> > +                                     hysteresis = <2000>;
> > +                                     type = "hot";
> > +                             };
> > +
> > +                             cpu_crit: cpu_crit {
> > +                                     /* milliCelsius */
> > +                                     temperature = <110000>;
> > +                                     hysteresis = <2000>;
> > +                                     type = "critical";
> > +                             };
> > +                     };
> > +             };
> > +
> > +             gpu0_thermal: gpu0-thermal {
> > +                     /* milliseconds */
> > +                     polling-delay-passive = <0>;
> > +                     polling-delay = <0>;
> > +                     thermal-sensors = <&ths 1>;
> > +             };
> > +
> > +             gpu1_thermal: gpu1-thermal {
> > +                     /* milliseconds */
> > +                     polling-delay-passive = <0>;
> > +                     polling-delay = <0>;
> > +                     thermal-sensors = <&ths 2>;
> > +             };
> > +     };
> > +
> >       soc {
> >               compatible = "simple-bus";
> >               #address-cells = <1>;
> >               #size-cells = <1>;
> >               ranges;
> >
> > -             de2@1000000 {
> > +             bus@1000000 {
> >                       compatible = "allwinner,sun50i-a64-de2";
> >                       reg = <0x1000000 0x400000>;
> >                       allwinner,sram = <&de2_sram 1>;
> > @@ -201,16 +246,28 @@
> >
> >                       display_clocks: clock@0 {
> >                               compatible = "allwinner,sun50i-a64-de2-clk";
> > -                             reg = <0x0 0x100000>;
> > -                             clocks = <&ccu CLK_DE>,
> > -                                      <&ccu CLK_BUS_DE>;
> > -                             clock-names = "mod",
> > -                                           "bus";
> > +                             reg = <0x0 0x10000>;
> > +                             clocks = <&ccu CLK_BUS_DE>,
> > +                                      <&ccu CLK_DE>;
> > +                             clock-names = "bus",
> > +                                           "mod";
> >                               resets = <&ccu RST_BUS_DE>;
> >                               #clock-cells = <1>;
> >                               #reset-cells = <1>;
> >                       };
> >
> > +                     rotate: rotate@20000 {
> > +                             compatible = "allwinner,sun50i-a64-de2-rotate",
> > +                                          "allwinner,sun8i-a83t-de2-rotate";
> > +                             reg = <0x20000 0x10000>;
> > +                             interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
> > +                             clocks = <&display_clocks CLK_BUS_ROT>,
> > +                                      <&display_clocks CLK_ROT>;
> > +                             clock-names = "bus",
> > +                                           "mod";
> > +                             resets = <&display_clocks RST_ROT>;
> > +                     };
> > +
> >                       mixer0: mixer@100000 {
> >                               compatible = "allwinner,sun50i-a64-de2-mixer-0";
> >                               reg = <0x100000 0x100000>;
> > @@ -225,11 +282,19 @@
> >                                       #size-cells = <0>;
> >
> >                                       mixer0_out: port@1 {
> > +                                             #address-cells = <1>;
> > +                                             #size-cells = <0>;
> >                                               reg = <1>;
> >
> > -                                             mixer0_out_tcon0: endpoint {
> > +                                             mixer0_out_tcon0: endpoint@0 {
> > +                                                     reg = <0>;
> >                                                       remote-endpoint = <&tcon0_in_mixer0>;
> >                                               };
> > +
> > +                                             mixer0_out_tcon1: endpoint@1 {
> > +                                                     reg = <1>;
> > +                                                     remote-endpoint = <&tcon1_in_mixer0>;
> > +                                             };
> >                                       };
> >                               };
> >                       };
> > @@ -248,9 +313,17 @@
> >                                       #size-cells = <0>;
> >
> >                                       mixer1_out: port@1 {
> > +                                             #address-cells = <1>;
> > +                                             #size-cells = <0>;
> >                                               reg = <1>;
> >
> > -                                             mixer1_out_tcon1: endpoint {
> > +                                             mixer1_out_tcon0: endpoint@0 {
> > +                                                     reg = <0>;
> > +                                                     remote-endpoint = <&tcon0_in_mixer1>;
> > +                                             };
> > +
> > +                                             mixer1_out_tcon1: endpoint@1 {
> > +                                                     reg = <1>;
> >                                                       remote-endpoint = <&tcon1_in_mixer1>;
> >                                               };
> >                                       };
> > @@ -259,8 +332,7 @@
> >               };
> >
> >               syscon: syscon@1c00000 {
> > -                     compatible = "allwinner,sun50i-a64-system-control",
> > -                             "syscon";
> > +                     compatible = "allwinner,sun50i-a64-system-control";
> >                       reg = <0x01c00000 0x1000>;
> >                       #address-cells = <1>;
> >                       #size-cells = <1>;
> > @@ -278,6 +350,20 @@
> >                                       reg = <0x0000 0x28000>;
> >                               };
> >                       };
> > +
> > +                     sram_c1: sram@1d00000 {
> > +                             compatible = "mmio-sram";
> > +                             reg = <0x01d00000 0x40000>;
> > +                             #address-cells = <1>;
> > +                             #size-cells = <1>;
> > +                             ranges = <0 0x01d00000 0x40000>;
> > +
> > +                             ve_sram: sram-section@0 {
> > +                                     compatible = "allwinner,sun50i-a64-sram-c1",
> > +                                                  "allwinner,sun4i-a10-sram-c1";
> > +                                     reg = <0x000000 0x40000>;
> > +                             };
> > +                     };
> >               };
> >
> >               dma: dma-controller@1c02000 {
> > @@ -299,6 +385,7 @@
> >                       clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
> >                       clock-names = "ahb", "tcon-ch0";
> >                       clock-output-names = "tcon-pixel-clock";
> > +                     #clock-cells = <0>;
> >                       resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>;
> >                       reset-names = "lcd", "lvds";
> >
> > @@ -315,12 +402,23 @@
> >                                               reg = <0>;
> >                                               remote-endpoint = <&mixer0_out_tcon0>;
> >                                       };
> > +
> > +                                     tcon0_in_mixer1: endpoint@1 {
> > +                                             reg = <1>;
> > +                                             remote-endpoint = <&mixer1_out_tcon0>;
> > +                                     };
> >                               };
> >
> >                               tcon0_out: port@1 {
> >                                       #address-cells = <1>;
> >                                       #size-cells = <0>;
> >                                       reg = <1>;
> > +
> > +                                     tcon0_out_dsi: endpoint@1 {
> > +                                             reg = <1>;
> > +                                             remote-endpoint = <&dsi_in_tcon0>;
> > +                                             allwinner,tcon-channel = <1>;
> > +                                     };
> >                               };
> >                       };
> >               };
> > @@ -340,9 +438,17 @@
> >                               #size-cells = <0>;
> >
> >                               tcon1_in: port@0 {
> > +                                     #address-cells = <1>;
> > +                                     #size-cells = <0>;
> >                                       reg = <0>;
> >
> > -                                     tcon1_in_mixer1: endpoint {
> > +                                     tcon1_in_mixer0: endpoint@0 {
> > +                                             reg = <0>;
> > +                                             remote-endpoint = <&mixer0_out_tcon1>;
> > +                                     };
> > +
> > +                                     tcon1_in_mixer1: endpoint@1 {
> > +                                             reg = <1>;
> >                                               remote-endpoint = <&mixer1_out_tcon1>;
> >                                       };
> >                               };
> > @@ -360,6 +466,17 @@
> >                       };
> >               };
> >
> > +             video-codec@1c0e000 {
> > +                     compatible = "allwinner,sun50i-a64-video-engine";
> > +                     reg = <0x01c0e000 0x1000>;
> > +                     clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
> > +                              <&ccu CLK_DRAM_VE>;
> > +                     clock-names = "ahb", "mod", "ram";
> > +                     resets = <&ccu RST_BUS_VE>;
> > +                     interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
> > +                     allwinner,sram = <&ve_sram 1>;
> > +             };
> > +
> >               mmc0: mmc@1c0f000 {
> >                       compatible = "allwinner,sun50i-a64-mmc";
> >                       reg = <0x01c0f000 0x1000>;
> > @@ -405,6 +522,31 @@
> >               sid: eeprom@1c14000 {
> >                       compatible = "allwinner,sun50i-a64-sid";
> >                       reg = <0x1c14000 0x400>;
> > +                     #address-cells = <1>;
> > +                     #size-cells = <1>;
> > +
> > +                     ths_calibration: thermal-sensor-calibration@34 {
> > +                             reg = <0x34 0x8>;
> > +                     };
> > +             };
> > +
> > +             crypto: crypto@1c15000 {
> > +                     compatible = "allwinner,sun50i-a64-crypto";
> > +                     reg = <0x01c15000 0x1000>;
> > +                     interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
> > +                     clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
> > +                     clock-names = "bus", "mod";
> > +                     resets = <&ccu RST_BUS_CE>;
> > +             };
> > +
> > +             msgbox: mailbox@1c17000 {
> > +                     compatible = "allwinner,sun50i-a64-msgbox",
> > +                                  "allwinner,sun6i-a31-msgbox";
> > +                     reg = <0x01c17000 0x1000>;
> > +                     clocks = <&ccu CLK_BUS_MSGBOX>;
> > +                     resets = <&ccu RST_BUS_MSGBOX>;
> > +                     interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> > +                     #mbox-cells = <1>;
> >               };
> >
> >               usb_otg: usb@1c19000 {
> > @@ -417,6 +559,7 @@
> >                       phys = <&usbphy 0>;
> >                       phy-names = "usb";
> >                       extcon = <&usbphy 0>;
> > +                     dr_mode = "otg";
> >                       status = "disabled";
> >               };
> >
> > @@ -491,7 +634,7 @@
> >               ccu: clock@1c20000 {
> >                       compatible = "allwinner,sun50i-a64-ccu";
> >                       reg = <0x01c20000 0x400>;
> > -                     clocks = <&osc24M>, <&osc32k>;
> > +                     clocks = <&osc24M>, <&rtc 0>;
> >                       clock-names = "hosc", "losc";
> >                       #clock-cells = <1>;
> >                       #reset-cells = <1>;
> > @@ -503,22 +646,50 @@
> >                       interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
> >                                    <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
> >                                    <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> > -                     clocks = <&ccu 58>;
> > +                     clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
> > +                     clock-names = "apb", "hosc", "losc";
> >                       gpio-controller;
> >                       #gpio-cells = <3>;
> >                       interrupt-controller;
> >                       #interrupt-cells = <3>;
> >
> > -                     i2c0_pins: i2c0_pins {
> > +                     csi_pins: csi-pins {
> > +                             pins = "PE0", "PE2", "PE3", "PE4", "PE5", "PE6",
> > +                                    "PE7", "PE8", "PE9", "PE10", "PE11";
> > +                             function = "csi";
> > +                     };
> > +
> > +                     /omit-if-no-ref/
> > +                     csi_mclk_pin: csi-mclk-pin {
> > +                             pins = "PE1";
> > +                             function = "csi";
> > +                     };
> > +
> > +                     i2c0_pins: i2c0-pins {
> >                               pins = "PH0", "PH1";
> >                               function = "i2c0";
> >                       };
> >
> > -                     i2c1_pins: i2c1_pins {
> > +                     i2c1_pins: i2c1-pins {
> >                               pins = "PH2", "PH3";
> >                               function = "i2c1";
> >                       };
> >
> > +                     i2c2_pins: i2c2-pins {
> > +                             pins = "PE14", "PE15";
> > +                             function = "i2c2";
> > +                     };
> > +
> > +                     /omit-if-no-ref/
> > +                     lcd_rgb666_pins: lcd-rgb666-pins {
> > +                             pins = "PD0", "PD1", "PD2", "PD3", "PD4",
> > +                                    "PD5", "PD6", "PD7", "PD8", "PD9",
> > +                                    "PD10", "PD11", "PD12", "PD13",
> > +                                    "PD14", "PD15", "PD16", "PD17",
> > +                                    "PD18", "PD19", "PD20", "PD21";
> > +                             function = "lcd0";
> > +                     };
> > +
> >                       mmc0_pins: mmc0-pins {
> >                               pins = "PF0", "PF1", "PF2", "PF3",
> >                                      "PF4", "PF5";
> > @@ -551,19 +722,19 @@
> >                               bias-pull-up;
> >                       };
> >
> > -                     pwm_pin: pwm_pin {
> > +                     pwm_pin: pwm-pin {
> >                               pins = "PD22";
> >                               function = "pwm";
> >                       };
> >
> > -                     rmii_pins: rmii_pins {
> > +                     rmii_pins: rmii-pins {
> >                               pins = "PD10", "PD11", "PD13", "PD14", "PD17",
> >                                      "PD18", "PD19", "PD20", "PD22", "PD23";
> >                               function = "emac";
> >                               drive-strength = <40>;
> >                       };
> >
> > -                     rgmii_pins: rgmii_pins {
> > +                     rgmii_pins: rgmii-pins {
> >                               pins = "PD8", "PD9", "PD10", "PD11", "PD12",
> >                                      "PD13", "PD15", "PD16", "PD17", "PD18",
> >                                      "PD19", "PD20", "PD21", "PD22", "PD23";
> > @@ -571,17 +742,17 @@
> >                               drive-strength = <40>;
> >                       };
> >
> > -                     spdif_tx_pin: spdif {
> > +                     spdif_tx_pin: spdif-tx-pin {
> >                               pins = "PH8";
> >                               function = "spdif";
> >                       };
> >
> > -                     spi0_pins: spi0 {
> > +                     spi0_pins: spi0-pins {
> >                               pins = "PC0", "PC1", "PC2", "PC3";
> >                               function = "spi0";
> >                       };
> >
> > -                     spi1_pins: spi1 {
> > +                     spi1_pins: spi1-pins {
> >                               pins = "PD0", "PD1", "PD2", "PD3";
> >                               function = "spi1";
> >                       };
> > @@ -591,12 +762,12 @@
> >                               function = "uart0";
> >                       };
> >
> > -                     uart1_pins: uart1_pins {
> > +                     uart1_pins: uart1-pins {
> >                               pins = "PG6", "PG7";
> >                               function = "uart1";
> >                       };
> >
> > -                     uart1_rts_cts_pins: uart1_rts_cts_pins {
> > +                     uart1_rts_cts_pins: uart1-rts-cts-pins {
> >                               pins = "PG8", "PG9";
> >                               function = "uart1";
> >                       };
> > @@ -638,6 +809,14 @@
> >                       status = "disabled";
> >               };
> >
> > +             lradc: lradc@1c21800 {
> > +                     compatible = "allwinner,sun50i-a64-lradc",
> > +                                  "allwinner,sun8i-a83t-r-lradc";
> > +                     reg = <0x01c21800 0x400>;
> > +                     interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> > +                     status = "disabled";
> > +             };
> > +
> >               i2s0: i2s@1c22000 {
> >                       #sound-dai-cells = <0>;
> >                       compatible = "allwinner,sun50i-a64-i2s",
> > @@ -666,6 +845,41 @@
> >                       status = "disabled";
> >               };
> >
> > +             dai: dai@1c22c00 {
> > +                     #sound-dai-cells = <0>;
> > +                     compatible = "allwinner,sun50i-a64-codec-i2s";
> > +                     reg = <0x01c22c00 0x200>;
> > +                     interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
> > +                     clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
> > +                     clock-names = "apb", "mod";
> > +                     resets = <&ccu RST_BUS_CODEC>;
> > +                     dmas = <&dma 15>, <&dma 15>;
> > +                     dma-names = "rx", "tx";
> > +                     status = "disabled";
> > +             };
> > +
> > +             codec: codec@1c22e00 {
> > +                     #sound-dai-cells = <0>;
> > +                     compatible = "allwinner,sun8i-a33-codec";
> > +                     reg = <0x01c22e00 0x600>;
> > +                     interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
> > +                     clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
> > +                     clock-names = "bus", "mod";
> > +                     status = "disabled";
> > +             };
> > +
> > +             ths: thermal-sensor@1c25000 {
> > +                     compatible = "allwinner,sun50i-a64-ths";
> > +                     reg = <0x01c25000 0x100>;
> > +                     clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
> > +                     clock-names = "bus", "mod";
> > +                     interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> > +                     resets = <&ccu RST_BUS_THS>;
> > +                     nvmem-cells = <&ths_calibration>;
> > +                     nvmem-cell-names = "calibration";
> > +                     #thermal-sensor-cells = <1>;
> > +             };
> > +
> >               uart0: serial@1c28000 {
> >                       compatible = "snps,dw-apb-uart";
> >                       reg = <0x01c28000 0x400>;
> > @@ -727,6 +941,8 @@
> >                       interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> >                       clocks = <&ccu CLK_BUS_I2C0>;
> >                       resets = <&ccu RST_BUS_I2C0>;
> > +                     pinctrl-names = "default";
> > +                     pinctrl-0 = <&i2c0_pins>;
> >                       status = "disabled";
> >                       #address-cells = <1>;
> >                       #size-cells = <0>;
> > @@ -738,6 +954,8 @@
> >                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> >                       clocks = <&ccu CLK_BUS_I2C1>;
> >                       resets = <&ccu RST_BUS_I2C1>;
> > +                     pinctrl-names = "default";
> > +                     pinctrl-0 = <&i2c1_pins>;
> >                       status = "disabled";
> >                       #address-cells = <1>;
> >                       #size-cells = <0>;
> > @@ -749,12 +967,13 @@
> >                       interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> >                       clocks = <&ccu CLK_BUS_I2C2>;
> >                       resets = <&ccu RST_BUS_I2C2>;
> > +                     pinctrl-names = "default";
> > +                     pinctrl-0 = <&i2c2_pins>;
> >                       status = "disabled";
> >                       #address-cells = <1>;
> >                       #size-cells = <0>;
> >               };
> >
> > -
> >               spi0: spi@1c68000 {
> >                       compatible = "allwinner,sun8i-h3-spi";
> >                       reg = <0x01c68000 0x1000>;
> > @@ -808,6 +1027,28 @@
> >                       };
> >               };
> >
> > +             mali: gpu@1c40000 {
> > +                     compatible = "allwinner,sun50i-a64-mali", "arm,mali-400";
> > +                     reg = <0x01c40000 0x10000>;
> > +                     interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
> > +                                  <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
> > +                                  <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
> > +                                  <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
> > +                                  <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
> > +                                  <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
> > +                                  <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
> > +                     interrupt-names = "gp",
> > +                                       "gpmmu",
> > +                                       "pp0",
> > +                                       "ppmmu0",
> > +                                       "pp1",
> > +                                       "ppmmu1",
> > +                                       "pmu";
> > +                     clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
> > +                     clock-names = "bus", "core";
> > +                     resets = <&ccu RST_BUS_GPU>;
> > +             };
> > +
> >               gic: interrupt-controller@1c81000 {
> >                       compatible = "arm,gic-400";
> >                       reg = <0x01c81000 0x1000>,
> > @@ -830,6 +1071,75 @@
> >                       status = "disabled";
> >               };
> >
> > +             mbus: dram-controller@1c62000 {
> > +                     compatible = "allwinner,sun50i-a64-mbus";
> > +                     reg = <0x01c62000 0x1000>;
> > +                     clocks = <&ccu 112>;
> > +                     #address-cells = <1>;
> > +                     #size-cells = <1>;
> > +                     dma-ranges = <0x00000000 0x40000000 0xc0000000>;
> > +                     #interconnect-cells = <1>;
> > +             };
> > +
> > +             csi: csi@1cb0000 {
> > +                     compatible = "allwinner,sun50i-a64-csi";
> > +                     reg = <0x01cb0000 0x1000>;
> > +                     interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
> > +                     clocks = <&ccu CLK_BUS_CSI>,
> > +                              <&ccu CLK_CSI_SCLK>,
> > +                              <&ccu CLK_DRAM_CSI>;
> > +                     clock-names = "bus", "mod", "ram";
> > +                     resets = <&ccu RST_BUS_CSI>;
> > +                     pinctrl-names = "default";
> > +                     pinctrl-0 = <&csi_pins>;
> > +                     status = "disabled";
> > +             };
> > +
> > +             dsi: dsi@1ca0000 {
> > +                     compatible = "allwinner,sun50i-a64-mipi-dsi";
> > +                     reg = <0x01ca0000 0x1000>;
> > +                     interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
> > +                     clocks = <&ccu CLK_BUS_MIPI_DSI>;
> > +                     resets = <&ccu RST_BUS_MIPI_DSI>;
> > +                     phys = <&dphy>;
> > +                     phy-names = "dphy";
> > +                     status = "disabled";
> > +                     #address-cells = <1>;
> > +                     #size-cells = <0>;
> > +
> > +                     port {
> > +                             dsi_in_tcon0: endpoint {
> > +                                     remote-endpoint = <&tcon0_out_dsi>;
> > +                             };
> > +                     };
> > +             };
> > +
> > +             dphy: d-phy@1ca1000 {
> > +                     compatible = "allwinner,sun50i-a64-mipi-dphy",
> > +                                  "allwinner,sun6i-a31-mipi-dphy";
> > +                     reg = <0x01ca1000 0x1000>;
> > +                     clocks = <&ccu CLK_BUS_MIPI_DSI>,
> > +                              <&ccu CLK_DSI_DPHY>;
> > +                     clock-names = "bus", "mod";
> > +                     resets = <&ccu RST_BUS_MIPI_DSI>;
> > +                     status = "disabled";
> > +                     #phy-cells = <0>;
> > +             };
> > +
> > +             deinterlace: deinterlace@1e00000 {
> > +                     compatible = "allwinner,sun50i-a64-deinterlace",
> > +                                  "allwinner,sun8i-h3-deinterlace";
> > +                     reg = <0x01e00000 0x20000>;
> > +                     clocks = <&ccu CLK_BUS_DEINTERLACE>,
> > +                              <&ccu CLK_DEINTERLACE>,
> > +                              <&ccu CLK_DRAM_DEINTERLACE>;
> > +                     clock-names = "bus", "mod", "ram";
> > +                     resets = <&ccu RST_BUS_DEINTERLACE>;
> > +                     interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
> > +                     interconnects = <&mbus 9>;
> > +                     interconnect-names = "dma-mem";
> > +             };
> > +
> >               hdmi: hdmi@1ee0000 {
> >                       compatible = "allwinner,sun50i-a64-dw-hdmi",
> >                                    "allwinner,sun8i-a83t-dw-hdmi";
> > @@ -842,7 +1152,7 @@
> >                       resets = <&ccu RST_BUS_HDMI1>;
> >                       reset-names = "ctrl";
> >                       phys = <&hdmi_phy>;
> > -                     phy-names = "hdmi-phy";
> > +                     phy-names = "phy";
> >                       status = "disabled";
> >
> >                       ports {
> > @@ -867,7 +1177,7 @@
> >                       compatible = "allwinner,sun50i-a64-hdmi-phy";
> >                       reg = <0x01ef0000 0x10000>;
> >                       clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
> > -                              <&ccu 7>;
> > +                              <&ccu CLK_PLL_VIDEO0>;
> >                       clock-names = "bus", "mod", "pll-0";
> >                       resets = <&ccu RST_BUS_HDMI0>;
> >                       reset-names = "phy";
> > @@ -875,11 +1185,12 @@
> >               };
> >
> >               rtc: rtc@1f00000 {
> > -                     compatible = "allwinner,sun6i-a31-rtc";
> > -                     reg = <0x01f00000 0x54>;
> > +                     compatible = "allwinner,sun50i-a64-rtc",
> > +                                  "allwinner,sun8i-h3-rtc";
> > +                     reg = <0x01f00000 0x400>;
> >                       interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
> >                                    <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
> > -                     clock-output-names = "rtc-osc32k", "rtc-osc32k-out";
> > +                     clock-output-names = "osc32k", "osc32k-out", "iosc";
> >                       clocks = <&osc32k>;
> >                       #clock-cells = <1>;
> >               };
> > @@ -896,13 +1207,19 @@
> >               r_ccu: clock@1f01400 {
> >                       compatible = "allwinner,sun50i-a64-r-ccu";
> >                       reg = <0x01f01400 0x100>;
> > -                     clocks = <&osc24M>, <&osc32k>, <&iosc>,
> > -                              <&ccu 11>;
> > +                     clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
> > +                              <&ccu CLK_PLL_PERIPH0>;
> >                       clock-names = "hosc", "losc", "iosc", "pll-periph";
> >                       #clock-cells = <1>;
> >                       #reset-cells = <1>;
> >               };
> >
> > +             codec_analog: codec-analog@1f015c0 {
> > +                     compatible = "allwinner,sun50i-a64-codec-analog";
> > +                     reg = <0x01f015c0 0x4>;
> > +                     status = "disabled";
> > +             };
> > +
> >               r_i2c: i2c@1f02400 {
> >                       compatible = "allwinner,sun50i-a64-i2c",
> >                                    "allwinner,sun6i-a31-i2c";
> > @@ -915,6 +1232,19 @@
> >                       #size-cells = <0>;
> >               };
> >
> > +             r_ir: ir@1f02000 {
> > +                     compatible = "allwinner,sun50i-a64-ir",
> > +                                  "allwinner,sun6i-a31-ir";
> > +                     reg = <0x01f02000 0x400>;
> > +                     clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>;
> > +                     clock-names = "apb", "ir";
> > +                     resets = <&r_ccu RST_APB0_IR>;
> > +                     interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
> > +                     pinctrl-names = "default";
> > +                     pinctrl-0 = <&r_ir_rx_pin>;
> > +                     status = "disabled";
> > +             };
> > +
> >               r_pwm: pwm@1f03800 {
> >                       compatible = "allwinner,sun50i-a64-pwm",
> >                                    "allwinner,sun5i-a13-pwm";
> > @@ -942,12 +1272,17 @@
> >                               function = "s_i2c";
> >                       };
> >
> > -                     r_pwm_pin: pwm {
> > +                     r_ir_rx_pin: r-ir-rx-pin {
> > +                             pins = "PL11";
> > +                             function = "s_cir_rx";
> > +                     };
> > +
> > +                     r_pwm_pin: r-pwm-pin {
> >                               pins = "PL10";
> >                               function = "s_pwm";
> >                       };
> >
> > -                     r_rsb_pins: rsb {
> > +                     r_rsb_pins: r-rsb-pins {
> >                               pins = "PL0", "PL1";
> >                               function = "s_rsb";
> >                       };
> > @@ -972,6 +1307,7 @@
> >                                    "allwinner,sun6i-a31-wdt";
> >                       reg = <0x01c20ca0 0x20>;
> >                       interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> > +                     clocks = <&osc24M>;
> >               };
> >       };
> >  };
> >
>

On 26.07.20 12:17, Peter Robinson wrote:
> On Thu, Jul 23, 2020 at 12:15 AM André Przywara <andre.przywara@arm.com> wrote:
>>
>> On 22/07/2020 15:18, Peter Robinson wrote:
>>> Sync the Allwinner A64 sun50i-a64.dtsi from Linux.
>>
>> Hi Peter,
>>
>> thanks for your series!
>>
>> While this looks mostly straight-forward, the problem is that this patch
>> here affects all Allwinner boards. And for them it breaks older kernels,
>> which cannot cope with some of the changed bindings or nodes.
>> Your patches up until here are fine, since they only add nodes and
>> properties, but this update changes nodes, some in a non-compatible way.
>>
>> Examples are dropping the "syscon" compatible (which requires 4.18 to
>> know about the new compatible string) and the dropping of
>> internal-osc-clk and the connected RTC change. This breaks any kernels
>> that don't know about the third RTC clock (<&rtc 2>) or the new
>> compatible string (introduced in 4.20). Similar effects show up in other
>> OSes.
>
> The 4.18 kernel is over 2 years old. How many users are going to
> actively upgrade U-Boot to the latest and not the kernel all while
> using the U-Boot provided DT and not just loading the matching kernel
> DT supplied by what ever ancient kernel they happen to choose to use?
> I feel this use case is quite a corner case and in those cases they're
> probably not using a vanilla upstream U-Boot anyway.

Sure people using an old Linux distribution not providing an U-Boot
image may do so.

But here we are talking about the U-Boot device tree. As Linux device
trees are release specific you should not try to boot Linux using a
devicetree not provided by the exact same Linux version.

So incompatiblities between old Linux releases and U-Boot's device tree
should be irrelevant.

Best regards

Heinrich

>
>> I was experimenting with some small changes (compared to mainline) to
>> overcome those issues, mostly by *adding* compatible strings instead of
>> *replacing* them.
>
> Shouldn't they be added to a -u-boot.dtsi?
>
>> So I would like to ask for a few days so that I can do more testing with
>> various kernels. I would then post those changes, so that we can discuss
>> them.
>>
>> Cheers,
>> Andre
>>
>>>
>>> Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
>>> ---
>>>  arch/arm/dts/sun50i-a64.dtsi | 532 ++++++++++++++++++++++++++++-------
>>>  1 file changed, 434 insertions(+), 98 deletions(-)
>>>
>>> diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi
>>> index ff41abc96a..8dfbcd1440 100644
>>> --- a/arch/arm/dts/sun50i-a64.dtsi
>>> +++ b/arch/arm/dts/sun50i-a64.dtsi
>>> @@ -1,46 +1,7 @@
>>> -/*
>>> - * Copyright (C) 2016 ARM Ltd.
>>> - * based on the Allwinner H3 dtsi:
>>> - *    Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
>>> - *
>>> - * This file is dual-licensed: you can use it either under the terms
>>> - * of the GPL or the X11 license, at your option. Note that this dual
>>> - * licensing only applies to this file, and not this project as a
>>> - * whole.
>>> - *
>>> - *  a) This file is free software; you can redistribute it and/or
>>> - *     modify it under the terms of the GNU General Public License as
>>> - *     published by the Free Software Foundation; either version 2 of the
>>> - *     License, or (at your option) any later version.
>>> - *
>>> - *     This file is distributed in the hope that it will be useful,
>>> - *     but WITHOUT ANY WARRANTY; without even the implied warranty of
>>> - *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>>> - *     GNU General Public License for more details.
>>> - *
>>> - * Or, alternatively,
>>> - *
>>> - *  b) Permission is hereby granted, free of charge, to any person
>>> - *     obtaining a copy of this software and associated documentation
>>> - *     files (the "Software"), to deal in the Software without
>>> - *     restriction, including without limitation the rights to use,
>>> - *     copy, modify, merge, publish, distribute, sublicense, and/or
>>> - *     sell copies of the Software, and to permit persons to whom the
>>> - *     Software is furnished to do so, subject to the following
>>> - *     conditions:
>>> - *
>>> - *     The above copyright notice and this permission notice shall be
>>> - *     included in all copies or substantial portions of the Software.
>>> - *
>>> - *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>>> - *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
>>> - *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>>> - *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
>>> - *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
>>> - *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>>> - *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>>> - *     OTHER DEALINGS IN THE SOFTWARE.
>>> - */
>>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>>> +// Copyright (C) 2016 ARM Ltd.
>>> +// based on the Allwinner H3 dtsi:
>>> +//    Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
>>>
>>>  #include <dt-bindings/clock/sun50i-a64-ccu.h>
>>>  #include <dt-bindings/clock/sun8i-de2.h>
>>> @@ -49,6 +10,7 @@
>>>  #include <dt-bindings/reset/sun50i-a64-ccu.h>
>>>  #include <dt-bindings/reset/sun8i-de2.h>
>>>  #include <dt-bindings/reset/sun8i-r-ccu.h>
>>> +#include <dt-bindings/thermal/thermal.h>
>>>
>>>  / {
>>>       interrupt-parent = <&gic>;
>>> @@ -84,35 +46,47 @@
>>>               #size-cells = <0>;
>>>
>>>               cpu0: cpu@0 {
>>> -                     compatible = "arm,cortex-a53", "arm,armv8";
>>> +                     compatible = "arm,cortex-a53";
>>>                       device_type = "cpu";
>>>                       reg = <0>;
>>>                       enable-method = "psci";
>>>                       next-level-cache = <&L2>;
>>> +                     clocks = <&ccu 21>;
>>> +                     clock-names = "cpu";
>>> +                     #cooling-cells = <2>;
>>>               };
>>>
>>>               cpu1: cpu@1 {
>>> -                     compatible = "arm,cortex-a53", "arm,armv8";
>>> +                     compatible = "arm,cortex-a53";
>>>                       device_type = "cpu";
>>>                       reg = <1>;
>>>                       enable-method = "psci";
>>>                       next-level-cache = <&L2>;
>>> +                     clocks = <&ccu 21>;
>>> +                     clock-names = "cpu";
>>> +                     #cooling-cells = <2>;
>>>               };
>>>
>>>               cpu2: cpu@2 {
>>> -                     compatible = "arm,cortex-a53", "arm,armv8";
>>> +                     compatible = "arm,cortex-a53";
>>>                       device_type = "cpu";
>>>                       reg = <2>;
>>>                       enable-method = "psci";
>>>                       next-level-cache = <&L2>;
>>> +                     clocks = <&ccu 21>;
>>> +                     clock-names = "cpu";
>>> +                     #cooling-cells = <2>;
>>>               };
>>>
>>>               cpu3: cpu@3 {
>>> -                     compatible = "arm,cortex-a53", "arm,armv8";
>>> +                     compatible = "arm,cortex-a53";
>>>                       device_type = "cpu";
>>>                       reg = <3>;
>>>                       enable-method = "psci";
>>>                       next-level-cache = <&L2>;
>>> +                     clocks = <&ccu 21>;
>>> +                     clock-names = "cpu";
>>> +                     #cooling-cells = <2>;
>>>               };
>>>
>>>               L2: l2-cache {
>>> @@ -139,15 +113,16 @@
>>>               #clock-cells = <0>;
>>>               compatible = "fixed-clock";
>>>               clock-frequency = <32768>;
>>> -             clock-output-names = "osc32k";
>>> +             clock-output-names = "ext-osc32k";
>>>       };
>>>
>>> -     iosc: internal-osc-clk {
>>> -             #clock-cells = <0>;
>>> -             compatible = "fixed-clock";
>>> -             clock-frequency = <16000000>;
>>> -             clock-accuracy = <300000000>;
>>> -             clock-output-names = "iosc";
>>> +     pmu {
>>> +             compatible = "arm,cortex-a53-pmu";
>>> +             interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
>>> +                          <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
>>> +                          <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
>>> +                          <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
>>> +             interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
>>>       };
>>>
>>>       psci {
>>> @@ -155,26 +130,33 @@
>>>               method = "smc";
>>>       };
>>>
>>> -     sound_spdif {
>>> +     sound: sound {
>>>               compatible = "simple-audio-card";
>>> -             simple-audio-card,name = "On-board SPDIF";
>>> +             simple-audio-card,name = "sun50i-a64-audio";
>>> +             simple-audio-card,format = "i2s";
>>> +             simple-audio-card,frame-master = <&cpudai>;
>>> +             simple-audio-card,bitclock-master = <&cpudai>;
>>> +             simple-audio-card,mclk-fs = <128>;
>>> +             simple-audio-card,aux-devs = <&codec_analog>;
>>> +             simple-audio-card,routing =
>>> +                             "Left DAC", "AIF1 Slot 0 Left",
>>> +                             "Right DAC", "AIF1 Slot 0 Right",
>>> +                             "AIF1 Slot 0 Left ADC", "Left ADC",
>>> +                             "AIF1 Slot 0 Right ADC", "Right ADC";
>>> +             status = "disabled";
>>>
>>> -             simple-audio-card,cpu {
>>> -                     sound-dai = <&spdif>;
>>> +             cpudai: simple-audio-card,cpu {
>>> +                     sound-dai = <&dai>;
>>>               };
>>>
>>> -             simple-audio-card,codec {
>>> -                     sound-dai = <&spdif_out>;
>>> +             link_codec: simple-audio-card,codec {
>>> +                     sound-dai = <&codec>;
>>>               };
>>>       };
>>>
>>> -     spdif_out: spdif-out {
>>> -             #sound-dai-cells = <0>;
>>> -             compatible = "linux,spdif-dit";
>>> -     };
>>> -
>>>       timer {
>>>               compatible = "arm,armv8-timer";
>>> +             allwinner,erratum-unknown1;
>>>               interrupts = <GIC_PPI 13
>>>                       (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
>>>                            <GIC_PPI 14
>>> @@ -185,13 +167,76 @@
>>>                       (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
>>>       };
>>>
>>> +     thermal-zones {
>>> +             cpu_thermal: cpu0-thermal {
>>> +                     /* milliseconds */
>>> +                     polling-delay-passive = <0>;
>>> +                     polling-delay = <0>;
>>> +                     thermal-sensors = <&ths 0>;
>>> +
>>> +                     cooling-maps {
>>> +                             map0 {
>>> +                                     trip = <&cpu_alert0>;
>>> +                                     cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>>> +                                                      <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>>> +                                                      <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>>> +                                                      <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
>>> +                             };
>>> +                             map1 {
>>> +                                     trip = <&cpu_alert1>;
>>> +                                     cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>>> +                                                      <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>>> +                                                      <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>>> +                                                      <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
>>> +                             };
>>> +                     };
>>> +
>>> +                     trips {
>>> +                             cpu_alert0: cpu_alert0 {
>>> +                                     /* milliCelsius */
>>> +                                     temperature = <75000>;
>>> +                                     hysteresis = <2000>;
>>> +                                     type = "passive";
>>> +                             };
>>> +
>>> +                             cpu_alert1: cpu_alert1 {
>>> +                                     /* milliCelsius */
>>> +                                     temperature = <90000>;
>>> +                                     hysteresis = <2000>;
>>> +                                     type = "hot";
>>> +                             };
>>> +
>>> +                             cpu_crit: cpu_crit {
>>> +                                     /* milliCelsius */
>>> +                                     temperature = <110000>;
>>> +                                     hysteresis = <2000>;
>>> +                                     type = "critical";
>>> +                             };
>>> +                     };
>>> +             };
>>> +
>>> +             gpu0_thermal: gpu0-thermal {
>>> +                     /* milliseconds */
>>> +                     polling-delay-passive = <0>;
>>> +                     polling-delay = <0>;
>>> +                     thermal-sensors = <&ths 1>;
>>> +             };
>>> +
>>> +             gpu1_thermal: gpu1-thermal {
>>> +                     /* milliseconds */
>>> +                     polling-delay-passive = <0>;
>>> +                     polling-delay = <0>;
>>> +                     thermal-sensors = <&ths 2>;
>>> +             };
>>> +     };
>>> +
>>>       soc {
>>>               compatible = "simple-bus";
>>>               #address-cells = <1>;
>>>               #size-cells = <1>;
>>>               ranges;
>>>
>>> -             de2@1000000 {
>>> +             bus@1000000 {
>>>                       compatible = "allwinner,sun50i-a64-de2";
>>>                       reg = <0x1000000 0x400000>;
>>>                       allwinner,sram = <&de2_sram 1>;
>>> @@ -201,16 +246,28 @@
>>>
>>>                       display_clocks: clock@0 {
>>>                               compatible = "allwinner,sun50i-a64-de2-clk";
>>> -                             reg = <0x0 0x100000>;
>>> -                             clocks = <&ccu CLK_DE>,
>>> -                                      <&ccu CLK_BUS_DE>;
>>> -                             clock-names = "mod",
>>> -                                           "bus";
>>> +                             reg = <0x0 0x10000>;
>>> +                             clocks = <&ccu CLK_BUS_DE>,
>>> +                                      <&ccu CLK_DE>;
>>> +                             clock-names = "bus",
>>> +                                           "mod";
>>>                               resets = <&ccu RST_BUS_DE>;
>>>                               #clock-cells = <1>;
>>>                               #reset-cells = <1>;
>>>                       };
>>>
>>> +                     rotate: rotate@20000 {
>>> +                             compatible = "allwinner,sun50i-a64-de2-rotate",
>>> +                                          "allwinner,sun8i-a83t-de2-rotate";
>>> +                             reg = <0x20000 0x10000>;
>>> +                             interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
>>> +                             clocks = <&display_clocks CLK_BUS_ROT>,
>>> +                                      <&display_clocks CLK_ROT>;
>>> +                             clock-names = "bus",
>>> +                                           "mod";
>>> +                             resets = <&display_clocks RST_ROT>;
>>> +                     };
>>> +
>>>                       mixer0: mixer@100000 {
>>>                               compatible = "allwinner,sun50i-a64-de2-mixer-0";
>>>                               reg = <0x100000 0x100000>;
>>> @@ -225,11 +282,19 @@
>>>                                       #size-cells = <0>;
>>>
>>>                                       mixer0_out: port@1 {
>>> +                                             #address-cells = <1>;
>>> +                                             #size-cells = <0>;
>>>                                               reg = <1>;
>>>
>>> -                                             mixer0_out_tcon0: endpoint {
>>> +                                             mixer0_out_tcon0: endpoint@0 {
>>> +                                                     reg = <0>;
>>>                                                       remote-endpoint = <&tcon0_in_mixer0>;
>>>                                               };
>>> +
>>> +                                             mixer0_out_tcon1: endpoint@1 {
>>> +                                                     reg = <1>;
>>> +                                                     remote-endpoint = <&tcon1_in_mixer0>;
>>> +                                             };
>>>                                       };
>>>                               };
>>>                       };
>>> @@ -248,9 +313,17 @@
>>>                                       #size-cells = <0>;
>>>
>>>                                       mixer1_out: port@1 {
>>> +                                             #address-cells = <1>;
>>> +                                             #size-cells = <0>;
>>>                                               reg = <1>;
>>>
>>> -                                             mixer1_out_tcon1: endpoint {
>>> +                                             mixer1_out_tcon0: endpoint@0 {
>>> +                                                     reg = <0>;
>>> +                                                     remote-endpoint = <&tcon0_in_mixer1>;
>>> +                                             };
>>> +
>>> +                                             mixer1_out_tcon1: endpoint@1 {
>>> +                                                     reg = <1>;
>>>                                                       remote-endpoint = <&tcon1_in_mixer1>;
>>>                                               };
>>>                                       };
>>> @@ -259,8 +332,7 @@
>>>               };
>>>
>>>               syscon: syscon@1c00000 {
>>> -                     compatible = "allwinner,sun50i-a64-system-control",
>>> -                             "syscon";
>>> +                     compatible = "allwinner,sun50i-a64-system-control";
>>>                       reg = <0x01c00000 0x1000>;
>>>                       #address-cells = <1>;
>>>                       #size-cells = <1>;
>>> @@ -278,6 +350,20 @@
>>>                                       reg = <0x0000 0x28000>;
>>>                               };
>>>                       };
>>> +
>>> +                     sram_c1: sram@1d00000 {
>>> +                             compatible = "mmio-sram";
>>> +                             reg = <0x01d00000 0x40000>;
>>> +                             #address-cells = <1>;
>>> +                             #size-cells = <1>;
>>> +                             ranges = <0 0x01d00000 0x40000>;
>>> +
>>> +                             ve_sram: sram-section@0 {
>>> +                                     compatible = "allwinner,sun50i-a64-sram-c1",
>>> +                                                  "allwinner,sun4i-a10-sram-c1";
>>> +                                     reg = <0x000000 0x40000>;
>>> +                             };
>>> +                     };
>>>               };
>>>
>>>               dma: dma-controller@1c02000 {
>>> @@ -299,6 +385,7 @@
>>>                       clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
>>>                       clock-names = "ahb", "tcon-ch0";
>>>                       clock-output-names = "tcon-pixel-clock";
>>> +                     #clock-cells = <0>;
>>>                       resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>;
>>>                       reset-names = "lcd", "lvds";
>>>
>>> @@ -315,12 +402,23 @@
>>>                                               reg = <0>;
>>>                                               remote-endpoint = <&mixer0_out_tcon0>;
>>>                                       };
>>> +
>>> +                                     tcon0_in_mixer1: endpoint@1 {
>>> +                                             reg = <1>;
>>> +                                             remote-endpoint = <&mixer1_out_tcon0>;
>>> +                                     };
>>>                               };
>>>
>>>                               tcon0_out: port@1 {
>>>                                       #address-cells = <1>;
>>>                                       #size-cells = <0>;
>>>                                       reg = <1>;
>>> +
>>> +                                     tcon0_out_dsi: endpoint@1 {
>>> +                                             reg = <1>;
>>> +                                             remote-endpoint = <&dsi_in_tcon0>;
>>> +                                             allwinner,tcon-channel = <1>;
>>> +                                     };
>>>                               };
>>>                       };
>>>               };
>>> @@ -340,9 +438,17 @@
>>>                               #size-cells = <0>;
>>>
>>>                               tcon1_in: port@0 {
>>> +                                     #address-cells = <1>;
>>> +                                     #size-cells = <0>;
>>>                                       reg = <0>;
>>>
>>> -                                     tcon1_in_mixer1: endpoint {
>>> +                                     tcon1_in_mixer0: endpoint@0 {
>>> +                                             reg = <0>;
>>> +                                             remote-endpoint = <&mixer0_out_tcon1>;
>>> +                                     };
>>> +
>>> +                                     tcon1_in_mixer1: endpoint@1 {
>>> +                                             reg = <1>;
>>>                                               remote-endpoint = <&mixer1_out_tcon1>;
>>>                                       };
>>>                               };
>>> @@ -360,6 +466,17 @@
>>>                       };
>>>               };
>>>
>>> +             video-codec@1c0e000 {
>>> +                     compatible = "allwinner,sun50i-a64-video-engine";
>>> +                     reg = <0x01c0e000 0x1000>;
>>> +                     clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
>>> +                              <&ccu CLK_DRAM_VE>;
>>> +                     clock-names = "ahb", "mod", "ram";
>>> +                     resets = <&ccu RST_BUS_VE>;
>>> +                     interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
>>> +                     allwinner,sram = <&ve_sram 1>;
>>> +             };
>>> +
>>>               mmc0: mmc@1c0f000 {
>>>                       compatible = "allwinner,sun50i-a64-mmc";
>>>                       reg = <0x01c0f000 0x1000>;
>>> @@ -405,6 +522,31 @@
>>>               sid: eeprom@1c14000 {
>>>                       compatible = "allwinner,sun50i-a64-sid";
>>>                       reg = <0x1c14000 0x400>;
>>> +                     #address-cells = <1>;
>>> +                     #size-cells = <1>;
>>> +
>>> +                     ths_calibration: thermal-sensor-calibration@34 {
>>> +                             reg = <0x34 0x8>;
>>> +                     };
>>> +             };
>>> +
>>> +             crypto: crypto@1c15000 {
>>> +                     compatible = "allwinner,sun50i-a64-crypto";
>>> +                     reg = <0x01c15000 0x1000>;
>>> +                     interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
>>> +                     clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
>>> +                     clock-names = "bus", "mod";
>>> +                     resets = <&ccu RST_BUS_CE>;
>>> +             };
>>> +
>>> +             msgbox: mailbox@1c17000 {
>>> +                     compatible = "allwinner,sun50i-a64-msgbox",
>>> +                                  "allwinner,sun6i-a31-msgbox";
>>> +                     reg = <0x01c17000 0x1000>;
>>> +                     clocks = <&ccu CLK_BUS_MSGBOX>;
>>> +                     resets = <&ccu RST_BUS_MSGBOX>;
>>> +                     interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
>>> +                     #mbox-cells = <1>;
>>>               };
>>>
>>>               usb_otg: usb@1c19000 {
>>> @@ -417,6 +559,7 @@
>>>                       phys = <&usbphy 0>;
>>>                       phy-names = "usb";
>>>                       extcon = <&usbphy 0>;
>>> +                     dr_mode = "otg";
>>>                       status = "disabled";
>>>               };
>>>
>>> @@ -491,7 +634,7 @@
>>>               ccu: clock@1c20000 {
>>>                       compatible = "allwinner,sun50i-a64-ccu";
>>>                       reg = <0x01c20000 0x400>;
>>> -                     clocks = <&osc24M>, <&osc32k>;
>>> +                     clocks = <&osc24M>, <&rtc 0>;
>>>                       clock-names = "hosc", "losc";
>>>                       #clock-cells = <1>;
>>>                       #reset-cells = <1>;
>>> @@ -503,22 +646,50 @@
>>>                       interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
>>>                                    <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
>>>                                    <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
>>> -                     clocks = <&ccu 58>;
>>> +                     clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
>>> +                     clock-names = "apb", "hosc", "losc";
>>>                       gpio-controller;
>>>                       #gpio-cells = <3>;
>>>                       interrupt-controller;
>>>                       #interrupt-cells = <3>;
>>>
>>> -                     i2c0_pins: i2c0_pins {
>>> +                     csi_pins: csi-pins {
>>> +                             pins = "PE0", "PE2", "PE3", "PE4", "PE5", "PE6",
>>> +                                    "PE7", "PE8", "PE9", "PE10", "PE11";
>>> +                             function = "csi";
>>> +                     };
>>> +
>>> +                     /omit-if-no-ref/
>>> +                     csi_mclk_pin: csi-mclk-pin {
>>> +                             pins = "PE1";
>>> +                             function = "csi";
>>> +                     };
>>> +
>>> +                     i2c0_pins: i2c0-pins {
>>>                               pins = "PH0", "PH1";
>>>                               function = "i2c0";
>>>                       };
>>>
>>> -                     i2c1_pins: i2c1_pins {
>>> +                     i2c1_pins: i2c1-pins {
>>>                               pins = "PH2", "PH3";
>>>                               function = "i2c1";
>>>                       };
>>>
>>> +                     i2c2_pins: i2c2-pins {
>>> +                             pins = "PE14", "PE15";
>>> +                             function = "i2c2";
>>> +                     };
>>> +
>>> +                     /omit-if-no-ref/
>>> +                     lcd_rgb666_pins: lcd-rgb666-pins {
>>> +                             pins = "PD0", "PD1", "PD2", "PD3", "PD4",
>>> +                                    "PD5", "PD6", "PD7", "PD8", "PD9",
>>> +                                    "PD10", "PD11", "PD12", "PD13",
>>> +                                    "PD14", "PD15", "PD16", "PD17",
>>> +                                    "PD18", "PD19", "PD20", "PD21";
>>> +                             function = "lcd0";
>>> +                     };
>>> +
>>>                       mmc0_pins: mmc0-pins {
>>>                               pins = "PF0", "PF1", "PF2", "PF3",
>>>                                      "PF4", "PF5";
>>> @@ -551,19 +722,19 @@
>>>                               bias-pull-up;
>>>                       };
>>>
>>> -                     pwm_pin: pwm_pin {
>>> +                     pwm_pin: pwm-pin {
>>>                               pins = "PD22";
>>>                               function = "pwm";
>>>                       };
>>>
>>> -                     rmii_pins: rmii_pins {
>>> +                     rmii_pins: rmii-pins {
>>>                               pins = "PD10", "PD11", "PD13", "PD14", "PD17",
>>>                                      "PD18", "PD19", "PD20", "PD22", "PD23";
>>>                               function = "emac";
>>>                               drive-strength = <40>;
>>>                       };
>>>
>>> -                     rgmii_pins: rgmii_pins {
>>> +                     rgmii_pins: rgmii-pins {
>>>                               pins = "PD8", "PD9", "PD10", "PD11", "PD12",
>>>                                      "PD13", "PD15", "PD16", "PD17", "PD18",
>>>                                      "PD19", "PD20", "PD21", "PD22", "PD23";
>>> @@ -571,17 +742,17 @@
>>>                               drive-strength = <40>;
>>>                       };
>>>
>>> -                     spdif_tx_pin: spdif {
>>> +                     spdif_tx_pin: spdif-tx-pin {
>>>                               pins = "PH8";
>>>                               function = "spdif";
>>>                       };
>>>
>>> -                     spi0_pins: spi0 {
>>> +                     spi0_pins: spi0-pins {
>>>                               pins = "PC0", "PC1", "PC2", "PC3";
>>>                               function = "spi0";
>>>                       };
>>>
>>> -                     spi1_pins: spi1 {
>>> +                     spi1_pins: spi1-pins {
>>>                               pins = "PD0", "PD1", "PD2", "PD3";
>>>                               function = "spi1";
>>>                       };
>>> @@ -591,12 +762,12 @@
>>>                               function = "uart0";
>>>                       };
>>>
>>> -                     uart1_pins: uart1_pins {
>>> +                     uart1_pins: uart1-pins {
>>>                               pins = "PG6", "PG7";
>>>                               function = "uart1";
>>>                       };
>>>
>>> -                     uart1_rts_cts_pins: uart1_rts_cts_pins {
>>> +                     uart1_rts_cts_pins: uart1-rts-cts-pins {
>>>                               pins = "PG8", "PG9";
>>>                               function = "uart1";
>>>                       };
>>> @@ -638,6 +809,14 @@
>>>                       status = "disabled";
>>>               };
>>>
>>> +             lradc: lradc@1c21800 {
>>> +                     compatible = "allwinner,sun50i-a64-lradc",
>>> +                                  "allwinner,sun8i-a83t-r-lradc";
>>> +                     reg = <0x01c21800 0x400>;
>>> +                     interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
>>> +                     status = "disabled";
>>> +             };
>>> +
>>>               i2s0: i2s@1c22000 {
>>>                       #sound-dai-cells = <0>;
>>>                       compatible = "allwinner,sun50i-a64-i2s",
>>> @@ -666,6 +845,41 @@
>>>                       status = "disabled";
>>>               };
>>>
>>> +             dai: dai@1c22c00 {
>>> +                     #sound-dai-cells = <0>;
>>> +                     compatible = "allwinner,sun50i-a64-codec-i2s";
>>> +                     reg = <0x01c22c00 0x200>;
>>> +                     interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
>>> +                     clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
>>> +                     clock-names = "apb", "mod";
>>> +                     resets = <&ccu RST_BUS_CODEC>;
>>> +                     dmas = <&dma 15>, <&dma 15>;
>>> +                     dma-names = "rx", "tx";
>>> +                     status = "disabled";
>>> +             };
>>> +
>>> +             codec: codec@1c22e00 {
>>> +                     #sound-dai-cells = <0>;
>>> +                     compatible = "allwinner,sun8i-a33-codec";
>>> +                     reg = <0x01c22e00 0x600>;
>>> +                     interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
>>> +                     clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
>>> +                     clock-names = "bus", "mod";
>>> +                     status = "disabled";
>>> +             };
>>> +
>>> +             ths: thermal-sensor@1c25000 {
>>> +                     compatible = "allwinner,sun50i-a64-ths";
>>> +                     reg = <0x01c25000 0x100>;
>>> +                     clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
>>> +                     clock-names = "bus", "mod";
>>> +                     interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
>>> +                     resets = <&ccu RST_BUS_THS>;
>>> +                     nvmem-cells = <&ths_calibration>;
>>> +                     nvmem-cell-names = "calibration";
>>> +                     #thermal-sensor-cells = <1>;
>>> +             };
>>> +
>>>               uart0: serial@1c28000 {
>>>                       compatible = "snps,dw-apb-uart";
>>>                       reg = <0x01c28000 0x400>;
>>> @@ -727,6 +941,8 @@
>>>                       interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
>>>                       clocks = <&ccu CLK_BUS_I2C0>;
>>>                       resets = <&ccu RST_BUS_I2C0>;
>>> +                     pinctrl-names = "default";
>>> +                     pinctrl-0 = <&i2c0_pins>;
>>>                       status = "disabled";
>>>                       #address-cells = <1>;
>>>                       #size-cells = <0>;
>>> @@ -738,6 +954,8 @@
>>>                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
>>>                       clocks = <&ccu CLK_BUS_I2C1>;
>>>                       resets = <&ccu RST_BUS_I2C1>;
>>> +                     pinctrl-names = "default";
>>> +                     pinctrl-0 = <&i2c1_pins>;
>>>                       status = "disabled";
>>>                       #address-cells = <1>;
>>>                       #size-cells = <0>;
>>> @@ -749,12 +967,13 @@
>>>                       interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
>>>                       clocks = <&ccu CLK_BUS_I2C2>;
>>>                       resets = <&ccu RST_BUS_I2C2>;
>>> +                     pinctrl-names = "default";
>>> +                     pinctrl-0 = <&i2c2_pins>;
>>>                       status = "disabled";
>>>                       #address-cells = <1>;
>>>                       #size-cells = <0>;
>>>               };
>>>
>>> -
>>>               spi0: spi@1c68000 {
>>>                       compatible = "allwinner,sun8i-h3-spi";
>>>                       reg = <0x01c68000 0x1000>;
>>> @@ -808,6 +1027,28 @@
>>>                       };
>>>               };
>>>
>>> +             mali: gpu@1c40000 {
>>> +                     compatible = "allwinner,sun50i-a64-mali", "arm,mali-400";
>>> +                     reg = <0x01c40000 0x10000>;
>>> +                     interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
>>> +                                  <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
>>> +                                  <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
>>> +                                  <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
>>> +                                  <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
>>> +                                  <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
>>> +                                  <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
>>> +                     interrupt-names = "gp",
>>> +                                       "gpmmu",
>>> +                                       "pp0",
>>> +                                       "ppmmu0",
>>> +                                       "pp1",
>>> +                                       "ppmmu1",
>>> +                                       "pmu";
>>> +                     clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
>>> +                     clock-names = "bus", "core";
>>> +                     resets = <&ccu RST_BUS_GPU>;
>>> +             };
>>> +
>>>               gic: interrupt-controller@1c81000 {
>>>                       compatible = "arm,gic-400";
>>>                       reg = <0x01c81000 0x1000>,
>>> @@ -830,6 +1071,75 @@
>>>                       status = "disabled";
>>>               };
>>>
>>> +             mbus: dram-controller@1c62000 {
>>> +                     compatible = "allwinner,sun50i-a64-mbus";
>>> +                     reg = <0x01c62000 0x1000>;
>>> +                     clocks = <&ccu 112>;
>>> +                     #address-cells = <1>;
>>> +                     #size-cells = <1>;
>>> +                     dma-ranges = <0x00000000 0x40000000 0xc0000000>;
>>> +                     #interconnect-cells = <1>;
>>> +             };
>>> +
>>> +             csi: csi@1cb0000 {
>>> +                     compatible = "allwinner,sun50i-a64-csi";
>>> +                     reg = <0x01cb0000 0x1000>;
>>> +                     interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
>>> +                     clocks = <&ccu CLK_BUS_CSI>,
>>> +                              <&ccu CLK_CSI_SCLK>,
>>> +                              <&ccu CLK_DRAM_CSI>;
>>> +                     clock-names = "bus", "mod", "ram";
>>> +                     resets = <&ccu RST_BUS_CSI>;
>>> +                     pinctrl-names = "default";
>>> +                     pinctrl-0 = <&csi_pins>;
>>> +                     status = "disabled";
>>> +             };
>>> +
>>> +             dsi: dsi@1ca0000 {
>>> +                     compatible = "allwinner,sun50i-a64-mipi-dsi";
>>> +                     reg = <0x01ca0000 0x1000>;
>>> +                     interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
>>> +                     clocks = <&ccu CLK_BUS_MIPI_DSI>;
>>> +                     resets = <&ccu RST_BUS_MIPI_DSI>;
>>> +                     phys = <&dphy>;
>>> +                     phy-names = "dphy";
>>> +                     status = "disabled";
>>> +                     #address-cells = <1>;
>>> +                     #size-cells = <0>;
>>> +
>>> +                     port {
>>> +                             dsi_in_tcon0: endpoint {
>>> +                                     remote-endpoint = <&tcon0_out_dsi>;
>>> +                             };
>>> +                     };
>>> +             };
>>> +
>>> +             dphy: d-phy@1ca1000 {
>>> +                     compatible = "allwinner,sun50i-a64-mipi-dphy",
>>> +                                  "allwinner,sun6i-a31-mipi-dphy";
>>> +                     reg = <0x01ca1000 0x1000>;
>>> +                     clocks = <&ccu CLK_BUS_MIPI_DSI>,
>>> +                              <&ccu CLK_DSI_DPHY>;
>>> +                     clock-names = "bus", "mod";
>>> +                     resets = <&ccu RST_BUS_MIPI_DSI>;
>>> +                     status = "disabled";
>>> +                     #phy-cells = <0>;
>>> +             };
>>> +
>>> +             deinterlace: deinterlace@1e00000 {
>>> +                     compatible = "allwinner,sun50i-a64-deinterlace",
>>> +                                  "allwinner,sun8i-h3-deinterlace";
>>> +                     reg = <0x01e00000 0x20000>;
>>> +                     clocks = <&ccu CLK_BUS_DEINTERLACE>,
>>> +                              <&ccu CLK_DEINTERLACE>,
>>> +                              <&ccu CLK_DRAM_DEINTERLACE>;
>>> +                     clock-names = "bus", "mod", "ram";
>>> +                     resets = <&ccu RST_BUS_DEINTERLACE>;
>>> +                     interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
>>> +                     interconnects = <&mbus 9>;
>>> +                     interconnect-names = "dma-mem";
>>> +             };
>>> +
>>>               hdmi: hdmi@1ee0000 {
>>>                       compatible = "allwinner,sun50i-a64-dw-hdmi",
>>>                                    "allwinner,sun8i-a83t-dw-hdmi";
>>> @@ -842,7 +1152,7 @@
>>>                       resets = <&ccu RST_BUS_HDMI1>;
>>>                       reset-names = "ctrl";
>>>                       phys = <&hdmi_phy>;
>>> -                     phy-names = "hdmi-phy";
>>> +                     phy-names = "phy";
>>>                       status = "disabled";
>>>
>>>                       ports {
>>> @@ -867,7 +1177,7 @@
>>>                       compatible = "allwinner,sun50i-a64-hdmi-phy";
>>>                       reg = <0x01ef0000 0x10000>;
>>>                       clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
>>> -                              <&ccu 7>;
>>> +                              <&ccu CLK_PLL_VIDEO0>;
>>>                       clock-names = "bus", "mod", "pll-0";
>>>                       resets = <&ccu RST_BUS_HDMI0>;
>>>                       reset-names = "phy";
>>> @@ -875,11 +1185,12 @@
>>>               };
>>>
>>>               rtc: rtc@1f00000 {
>>> -                     compatible = "allwinner,sun6i-a31-rtc";
>>> -                     reg = <0x01f00000 0x54>;
>>> +                     compatible = "allwinner,sun50i-a64-rtc",
>>> +                                  "allwinner,sun8i-h3-rtc";
>>> +                     reg = <0x01f00000 0x400>;
>>>                       interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
>>>                                    <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
>>> -                     clock-output-names = "rtc-osc32k", "rtc-osc32k-out";
>>> +                     clock-output-names = "osc32k", "osc32k-out", "iosc";
>>>                       clocks = <&osc32k>;
>>>                       #clock-cells = <1>;
>>>               };
>>> @@ -896,13 +1207,19 @@
>>>               r_ccu: clock@1f01400 {
>>>                       compatible = "allwinner,sun50i-a64-r-ccu";
>>>                       reg = <0x01f01400 0x100>;
>>> -                     clocks = <&osc24M>, <&osc32k>, <&iosc>,
>>> -                              <&ccu 11>;
>>> +                     clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
>>> +                              <&ccu CLK_PLL_PERIPH0>;
>>>                       clock-names = "hosc", "losc", "iosc", "pll-periph";
>>>                       #clock-cells = <1>;
>>>                       #reset-cells = <1>;
>>>               };
>>>
>>> +             codec_analog: codec-analog@1f015c0 {
>>> +                     compatible = "allwinner,sun50i-a64-codec-analog";
>>> +                     reg = <0x01f015c0 0x4>;
>>> +                     status = "disabled";
>>> +             };
>>> +
>>>               r_i2c: i2c@1f02400 {
>>>                       compatible = "allwinner,sun50i-a64-i2c",
>>>                                    "allwinner,sun6i-a31-i2c";
>>> @@ -915,6 +1232,19 @@
>>>                       #size-cells = <0>;
>>>               };
>>>
>>> +             r_ir: ir@1f02000 {
>>> +                     compatible = "allwinner,sun50i-a64-ir",
>>> +                                  "allwinner,sun6i-a31-ir";
>>> +                     reg = <0x01f02000 0x400>;
>>> +                     clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>;
>>> +                     clock-names = "apb", "ir";
>>> +                     resets = <&r_ccu RST_APB0_IR>;
>>> +                     interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
>>> +                     pinctrl-names = "default";
>>> +                     pinctrl-0 = <&r_ir_rx_pin>;
>>> +                     status = "disabled";
>>> +             };
>>> +
>>>               r_pwm: pwm@1f03800 {
>>>                       compatible = "allwinner,sun50i-a64-pwm",
>>>                                    "allwinner,sun5i-a13-pwm";
>>> @@ -942,12 +1272,17 @@
>>>                               function = "s_i2c";
>>>                       };
>>>
>>> -                     r_pwm_pin: pwm {
>>> +                     r_ir_rx_pin: r-ir-rx-pin {
>>> +                             pins = "PL11";
>>> +                             function = "s_cir_rx";
>>> +                     };
>>> +
>>> +                     r_pwm_pin: r-pwm-pin {
>>>                               pins = "PL10";
>>>                               function = "s_pwm";
>>>                       };
>>>
>>> -                     r_rsb_pins: rsb {
>>> +                     r_rsb_pins: r-rsb-pins {
>>>                               pins = "PL0", "PL1";
>>>                               function = "s_rsb";
>>>                       };
>>> @@ -972,6 +1307,7 @@
>>>                                    "allwinner,sun6i-a31-wdt";
>>>                       reg = <0x01c20ca0 0x20>;
>>>                       interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
>>> +                     clocks = <&osc24M>;
>>>               };
>>>       };
>>>  };
>>>
>>

On 27/07/2020 14:16, Heinrich Schuchardt wrote:

Hi Peter, Heinrich,

> On 26.07.20 12:17, Peter Robinson wrote:
>> On Thu, Jul 23, 2020 at 12:15 AM André Przywara <andre.przywara@arm.com> wrote:
>>>
>>> On 22/07/2020 15:18, Peter Robinson wrote:
>>>> Sync the Allwinner A64 sun50i-a64.dtsi from Linux.
>>>
>>> Hi Peter,
>>>
>>> thanks for your series!
>>>
>>> While this looks mostly straight-forward, the problem is that this patch
>>> here affects all Allwinner boards. And for them it breaks older kernels,
>>> which cannot cope with some of the changed bindings or nodes.
>>> Your patches up until here are fine, since they only add nodes and
>>> properties, but this update changes nodes, some in a non-compatible way.
>>>
>>> Examples are dropping the "syscon" compatible (which requires 4.18 to
>>> know about the new compatible string) and the dropping of
>>> internal-osc-clk and the connected RTC change. This breaks any kernels
>>> that don't know about the third RTC clock (<&rtc 2>) or the new
>>> compatible string (introduced in 4.20). Similar effects show up in other
>>> OSes.
>>
>> The 4.18 kernel is over 2 years old. How many users are going to
>> actively upgrade U-Boot to the latest and not the kernel all while
>> using the U-Boot provided DT and not just loading the matching kernel
>> DT supplied by what ever ancient kernel they happen to choose to use?

Everyone who wants to boot the UEFI/distro way, using the DT as a
hardware description, provided by the firmware. Yes, for years people
got used to somehow get some matching revision of the right DT loaded
together with the kernel, but the UEFI boot flow makes this rather hard
to do.
And with the availability of $fdtcontroladdr (which is actually
implicit if bootefi is just called with one argument) this would all fit
so nicely: You have your device specific firmware build (firmware in the
classis sense, not the Android meaning), and the rest (kernel, userland,
secondary bootloaders) is generic and everything falls in place.

>> I feel this use case is quite a corner case and in those cases they're
>> probably not using a vanilla upstream U-Boot anyway.
> 
> Sure people using an old Linux distribution not providing an U-Boot
> image may do so.
> 
> But here we are talking about the U-Boot device tree.

What is a "U-Boot device tree"? The device tree describes the hardware,
so how would that be different between Linux, U-Boot, FreeBSD or Zephyr?
For practical reasons (no on-board storage, for instance) the DT is
shipped with some software/firmware, but the concept is still that of a
kernel-agnostic description.

Actually U-Boot's own DT needs are very minimal: we could get away with
a VERY basic DT, barely containing a clock node, and MMC, EMAC and USB
nodes with just reg and clocks properties.

But since a U-Boot build is per-board, it sounds natural to make this
the only place which holds the respective devicetree, so any user would
just consume it and doesn't need to have any further board specific
information.

> As Linux device
> trees are release specific you should not try to boot Linux using a
> devicetree not provided by the exact same Linux version.

Where does this statement come from? Definitely you can boot Linux with
DTs from a previous version, but conceptually DTs are independent from
any software consumer. It's just very hard to get that right if you
don't have all the documentation upfront, to create DT nodes which
describe everything you need. That's why some platform maintainers
decided to not guarantee forward compatibility for their platform.
Which doesn't mean we should not still aim at this, hence my request to
tweak some compatible string to restore compatibility across various
Linux kernel releases (used by distributions as their official kernel).

> So incompatiblities between old Linux releases and U-Boot's device tree
> should be irrelevant.
> 
> Best regards
> 
> Heinrich
> 
>>
>>> I was experimenting with some small changes (compared to mainline) to
>>> overcome those issues, mostly by *adding* compatible strings instead of
>>> *replacing* them.
>>
>> Shouldn't they be added to a -u-boot.dtsi?

This might be a possible way to implement this, although the idea of
those files is to accommodate U-Boot specific nodes or properties.

Cheers,
Andre

>>> So I would like to ask for a few days so that I can do more testing with
>>> various kernels. I would then post those changes, so that we can discuss
>>> them.
>>>
>>> Cheers,
>>> Andre
>>>
>>>>
>>>> Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
>>>> ---
>>>>  arch/arm/dts/sun50i-a64.dtsi | 532 ++++++++++++++++++++++++++++-------
>>>>  1 file changed, 434 insertions(+), 98 deletions(-)
>>>>