diff mbox series

[3/3] ARM: dts: meson-sm1-odroid-c4: add ethernet PHY reset

Message ID 20200701144310.25481-4-narmstrong@baylibre.com
State New
Delegated to: Neil Armstrong
Headers show
Series board: amlogic: add Odroid C4 support | expand

Commit Message

Neil Armstrong July 1, 2020, 2:43 p.m. UTC
The PHY needs a reset in order to be functionnal for U-Boot, add the old
PHY reset bindings for dwmac until we support the new bindings in the PHY node.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Anand Moon July 2, 2020, 3:09 a.m. UTC | #1
Hi Neil,

On Wed, 1 Jul 2020 at 20:13, Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> The PHY needs a reset in order to be functionnal for U-Boot, add the old
> PHY reset bindings for dwmac until we support the new bindings in the PHY node.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---

Please add my
Tested-by: Anand Moon <linux.amoon@gmail.com>

>  arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi b/arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi
> index ee32c6f43d..2a8f0545b1 100644
> --- a/arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi
> +++ b/arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi
> @@ -5,3 +5,9 @@
>   */
>
>  #include "meson-g12-common-u-boot.dtsi"
> +
> +&ethmac {
> +       snps,reset-gpio = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
> +       snps,reset-delays-us = <0 10000 1000000>;
> +       snps,reset-active-low;
> +};
> --
> 2.22.0
>
diff mbox series

Patch

diff --git a/arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi b/arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi
index ee32c6f43d..2a8f0545b1 100644
--- a/arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi
+++ b/arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi
@@ -5,3 +5,9 @@ 
  */
 
 #include "meson-g12-common-u-boot.dtsi"
+
+&ethmac {
+	snps,reset-gpio = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
+	snps,reset-delays-us = <0 10000 1000000>;
+	snps,reset-active-low;
+};