From patchwork Wed Jul 1 09:00:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfgang Wallner X-Patchwork-Id: 1321033 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=br-automation.com Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49y9v73Z8Cz9sR4 for ; Thu, 2 Jul 2020 18:17:39 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D223A81B88; Thu, 2 Jul 2020 10:16:58 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=br-automation.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 71F2481B47; Wed, 1 Jul 2020 11:00:15 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from mail2.br-automation.com (mail2.br-automation.com [213.33.116.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id B79158044A for ; Wed, 1 Jul 2020 11:00:11 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=br-automation.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=wolfgang.wallner@br-automation.com X-AuditID: c0a80110-0dbff70000007cc3-1b-5efc509bb9f2 Received: from brsmtp01.br-automation.co.at (Unknown_Domain [192.168.1.60]) by mail2.br-automation.com () with SMTP id 1C.DE.31939.B905CFE5; Wed, 1 Jul 2020 11:00:11 +0200 (CEST) From: "Wolfgang Wallner" To: u-boot@lists.denx.de Cc: "Simon Glass" , "Bin Meng" , "Wolfgang Wallner" ,"Eugen Hristev" ,"Finley Xiao" ,"Kever Yang" ,"Peng Fan" ,"Pragnesh Patel" ,"Tero Kristo" ,"Trevor Woerner" Subject: [PATCH 1/2] drivers: p2sb: replace Primary-to-Sideband Bus with Primary to Sideband Bridge Date: Wed, 1 Jul 2020 11:00:00 +0200 Message-Id: <20200701090001.229889-2-wolfgang.wallner@br-automation.com> In-Reply-To: <20200701090001.229889-1-wolfgang.wallner@br-automation.com> X-Mailer: git-send-email 2.27.0 References: <20200701090001.229889-1-wolfgang.wallner@br-automation.com> MIME-Version: 1.0 X-MIMETrack: Itemize by SMTP Server on BRSMTPINTERN2/InternSMTP(Release 10.0.1FP3|August 09, 2019) at 01/07/2020 11:00:11, Serialize by Router on BRSMTPINTERN2/InternSMTP(Release 10.0.1FP3|August 09, 2019) at 01/07/2020 11:00:11, Itemize by SMTP Server on BRSMTP01/Eggelsberg/AT/B&R(Release 10.0.1FP3|August 09, 2019) at 07/01/2020 11:00:11 AM X-TNEFEvaluated: 1 X-Disclaimed: 23047 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrALMWRmVeSWpSXmKPExsVyYAWjje7sgD9xBreb1Cym9sRbHPhxnMWi b4mVxbbpP9ksfqz6wmpxddZBJotvW7YxWix52sFmcefFJyaLt3s72R24PGY3XGTx2DnrLrvH 2Ts7GD3u/FjK6LHx3Q4mj7+z9rN4XGq+zu5x/MZ2pgCOKC6blNSczLLUIn27BK6MSZ0H2Qpu 8Ve8+zefpYHxJE8XIweHhICJxNM1Kl2MXBxCAlsZJV6dXsPYxcjJwSZgK9F4ZCsbiC0iICHx q/8qI0gRs8BMZombvbfYQJqFBZIlXsyJA6lhEVCRuLWujwnE5hXwkPhzfA4ziM0p4ClxbuF2 sJnMAtoSyxa+BotLCMhLTJx9FywuBFS/btpUdoheQYmTM5+wgOySELjNJPFv9So2iAYhidOL z0I1C0vM/NDEPIFRYBaSubOQ9C9gZFrFKJ6bmJljpJdUpJtYWpKfm1iSmZ+nl5yfu4kREgsC Oxh3v9E+xMjEwXiIUYKDWUmE97TBrzgh3pTEyqrUovz4otKc1OJDjNIcLErivL5XteKEBNIT S1KzU1MLUotgskwcnFINjBJB+b/q3Xy3HhaYszJXlfXJg9leM59vKrN+GD3d2+H1lANySlrM K5uUhePOVzwLfbpIeIHw4nIWH/43nw+5vLt1h8OIr3ZhiteKWSJF6w6JPlWI1klmPOpzcP++ ysmrN5Z66f9u5la29LhwJXzhrg09Bu/XHvLTK+louLC3dN40lozZvI53rimxFGckGmoxFxUn AgCcUlZQcwIAAA== X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean In Intel's documentation the term P2SB stands for "Primary to Sideband Bridge". Signed-off-by: Wolfgang Wallner Reviewed-by: Simon Glass --- drivers/misc/Kconfig | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 6bb5bc77e9..b6b8510e40 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -243,10 +243,10 @@ config NUVOTON_NCT6102D in the Nuvoton Super IO chips on X86 platforms. config P2SB - bool "Intel Primary-to-Sideband Bus" + bool "Intel Primary to Sideband Bridge" depends on X86 || SANDBOX help - This enables support for the Intel Primary-to-Sideband bus, + This enables support for the Intel Primary to Sideband Bridge, abbreviated to P2SB. The P2SB is used to access various peripherals such as eSPI, GPIO, through memory-mapped I/O in a large chunk of PCI space. The space is segmented into different channels and peripherals @@ -259,7 +259,7 @@ config SPL_P2SB bool "Intel Primary-to-Sideband Bus in SPL" depends on SPL && (X86 || SANDBOX) help - The Primary-to-Sideband bus is used to access various peripherals + The Primary to Sideband Bridge is used to access various peripherals through memory-mapped I/O in a large chunk of PCI space. The space is segmented into different channels and peripherals are accessed by device-specific means within those channels. Devices should be added @@ -269,7 +269,7 @@ config TPL_P2SB bool "Intel Primary-to-Sideband Bus in TPL" depends on TPL && (X86 || SANDBOX) help - The Primary-to-Sideband bus is used to access various peripherals + The Primary to Sideband Bridge is used to access various peripherals through memory-mapped I/O in a large chunk of PCI space. The space is segmented into different channels and peripherals are accessed by device-specific means within those channels. Devices should be added