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Tue, 2 Jun 2020 12:07:05 +0000 (GMT) From: Marek Szyprowski To: u-boot@lists.denx.de Cc: Marek Szyprowski , Matthias Brugger , Tom Rini , Sylwester Nawrocki , Wolfgang Denk , Marek Vasut , Bin Meng , Nicolas Saenz Julienne , Simon Glass , Jaehoon Chung , Bartlomiej Zolnierkiewicz Subject: [PATCH v4 2/5] arm: provide a function for boards init code to modify MMU virtual-physical map Date: Tue, 2 Jun 2020 14:04:20 +0200 Message-Id: <20200602120423.6285-3-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200602120423.6285-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0VSa0hTYRjm29l2jsPlcQp+WiQOjDRSZ1ZHsrLwx/lXhBEIbm16cGNu2qaW 2g/N0FxaXtOmmJkxU3Q1t+UttHVZ4DVNMdTyFtR0YXZ1ZeXpWP173+d53vd5eHkxRHCT44cp 1GmURi1NFnJ5bOvTteHdjugJcdjSfDBxr9rIISqLJMSkK59DtD6eQYnl/FxA1Jcvcgir3sAl Hi0XcIgvZisgKsvaUcL5oBAlyuccINqdrMl5zibr9M/YZKd+BiUdfc0oOTjdAcgr5mZAGs3j bLK9P/s4FseLSqSSFRmUJvTQaZ78TsdLVqpl+7nGij4kB9T46gCGQTwCdtlO6QAPE+BNABrm O4EOuG00nwCsXZAwxEcAK6+/QWiCHrhmMqIMYQDw7Xo9l2k2Jpa+WVBaxcVFUOfUcenaG4fQ dXUc0CIENyNQX/f+zyovXAEtbW0cumbjgXCgtBXQmfh4FPxqcGfc/GHL3T6Eht3wg3BiIJte A3ETCovv56KMJgb2VNg303lBh928iW+DvzpvsJiBPADnhlpRpikCcOxCNWBUB+D0kItLOyB4 EDR2hTLwEdi42oQyN9oCJ52eNIxslGXWKoSB+fBSvoBR74B6e9s/24cjo5txSDg8ZgHMfUoA LM/tRUuAv/6/WT0AzcCHSteqkiitSE2dDdFKVdp0dVJIQorKBDYep/+nfbUDfB6V2QCOAaE7 P0w0IRZwpBnaTJUNQAwRevOPDvaLBfxEaWYWpUmRaNKTKa0NbMXYQh/+noZ38QI8SZpGKSkq ldL8ZVmYm18OKJSUOX+s7J+NjKglv38IeOWcCjAI1UPdLa9XFj3PXI7zi0ldU/pGhico5Xsd PSfspSPrO87HVu8riJItTJ20Zs8KqhbEu7p1rtgs+ZrHzorD4bUFNdEXdbeezN+WjCh7G0Zb iMEXQSvYahBpjGd5yBTFfrK0PNP0WP2xwCgHV8jWyqWiYESjlf4G/TCU0TQDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpmkeLIzCtJLcpLzFFi42I5/e/4Xd1XDtfiDB5OF7XYOGM9q8XUnniL G7/aWC3WHrnLbvGmrZHRYsHkJ6wW22YtZ7M4/Kad1eLblm2MFlMnbWa3eLu3k91i8sNXjA48 HrMbLrJ4zJt1gsVj56y77B6vDqxi9zh7ZwejR9+WVYwe67dcZfHYfLo6gCNKz6Yov7QkVSEj v7jEVina0MJIz9DSQs/IxFLP0Ng81srIVEnfziYlNSezLLVI3y5BL2PljptMBVvlKpZMOcDc wDhbsouRk0NCwERi2qb17F2MXBxCAksZJdr+XGCGSMhInJzWwAphC0v8udbFBlH0iVGi98NL FpAEm4ChRNdbkAQnh4iAhMSv/quMIEXMAnuYJZ6+vsQEkhAWSJdYMns2O4jNIqAqcWbiWqAi Dg5eARuJ78t5IBbIS6zecIAZJMwpYCtx7Uw1SFgIqGLD/WbmCYx8CxgZVjGKpJYW56bnFhvq FSfmFpfmpesl5+duYgRGwLZjPzfvYLy0MfgQowAHoxIPr4HhtTgh1sSy4srcQ4wSHMxKIrxO Z0/HCfGmJFZWpRblxxeV5qQWH2I0BTppIrOUaHI+MDrzSuINTQ3NLSwNzY3Njc0slMR5OwQO xggJpCeWpGanphakFsH0MXFwSjUwhq+/mi3KfrTul6qj79P5z4x9rFuS2z5b5OUK+zyz8Fke xDt1Y/mqGxIypyRjjHr+LU+ctkBF/rLsykstG7YKKvCdXzv///KGiv8PFkRdfXm7uXZ/9B/N qFdv7Z/6dX68uX2dw9/3vH8mpsprsn2b+HvTekO2dbfjzzMeqlTauvT6vSvhr/vb3yuxFGck GmoxFxUnAgDGD8+klgIAAA== X-CMS-MailID: 20200602120706eucas1p1d0bba520d15d775bc5d7d1928b1e5cb5 X-Msg-Generator: CA X-RootMTR: 20200602120706eucas1p1d0bba520d15d775bc5d7d1928b1e5cb5 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20200602120706eucas1p1d0bba520d15d775bc5d7d1928b1e5cb5 References: <20200602120423.6285-1-m.szyprowski@samsung.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean Provide function for setting arbitrary virtual-physical MMU mapping for the given region. Signed-off-by: Marek Szyprowski Change-Id: If10b06cc6edbdff311a1b6302112e8cd0bb5313f --- arch/arm/include/asm/mmu.h | 8 ++++++++ arch/arm/include/asm/system.h | 11 +++++++++++ arch/arm/lib/cache-cp15.c | 24 ++++++++++++++++++------ 3 files changed, 37 insertions(+), 6 deletions(-) create mode 100644 arch/arm/include/asm/mmu.h diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h new file mode 100644 index 00000000000..fe3d7930790 --- /dev/null +++ b/arch/arm/include/asm/mmu.h @@ -0,0 +1,8 @@ +#ifndef __ASM_ARM_MMU_H +#define __ASM_ARM_MMU_H + +#ifdef CONFIG_ADDR_MAP +extern void init_addr_map(void); +#endif + +#endif diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 1e3f574403a..6b6095d78e2 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -581,6 +581,17 @@ s32 psci_features(u32 function_id, u32 psci_fid); */ void save_boot_params_ret(void); +/** + * Change the virt/phys mapping and cache settings for a region. + * + * \param virt virtual start address of memory region to change + * \param phys physical address for the memory region to set + * \param size size of memory region to change + * \param option dcache option to select + */ +void mmu_set_region_dcache_behaviour_phys(phys_addr_t virt, phys_addr_t phys, + size_t size, enum dcache_option option); + /** * Change the cache settings for a region. * diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index 1da2e92fe24..39717610d41 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -25,7 +25,8 @@ __weak void arm_init_domains(void) { } -void set_section_dcache(int section, enum dcache_option option) +static void set_section_phys(int section, phys_addr_t phys, + enum dcache_option option) { #ifdef CONFIG_ARMV7_LPAE u64 *page_table = (u64 *)gd->arch.tlb_addr; @@ -37,7 +38,7 @@ void set_section_dcache(int section, enum dcache_option option) #endif /* Add the page offset */ - value |= ((u32)section << MMU_SECTION_SHIFT); + value |= phys; /* Add caching bits */ value |= option; @@ -46,13 +47,18 @@ void set_section_dcache(int section, enum dcache_option option) page_table[section] = value; } +void set_section_dcache(int section, enum dcache_option option) +{ + set_section_phys(section, (u32)section << MMU_SECTION_SHIFT, option); +} + __weak void mmu_page_table_flush(unsigned long start, unsigned long stop) { debug("%s: Warning: not implemented\n", __func__); } -void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, - enum dcache_option option) +void mmu_set_region_dcache_behaviour_phys(phys_addr_t start, phys_addr_t phys, + size_t size, enum dcache_option option) { #ifdef CONFIG_ARMV7_LPAE u64 *page_table = (u64 *)gd->arch.tlb_addr; @@ -74,8 +80,8 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, debug("%s: start=%pa, size=%zu, option=0x%x\n", __func__, &start, size, option); #endif - for (upto = start; upto < end; upto++) - set_section_dcache(upto, option); + for (upto = start; upto < end; upto++, phys += MMU_SECTION_SIZE) + set_section_phys(upto, phys, option); /* * Make sure range is cache line aligned @@ -90,6 +96,12 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, mmu_page_table_flush(startpt, stoppt); } +void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, + enum dcache_option option) +{ + mmu_set_region_dcache_behaviour_phys(start, start, size, option); +} + __weak void dram_bank_mmu_setup(int bank) { bd_t *bd = gd->bd;