diff mbox series

[RESEND,v2,09/11] net: dwc_eth_qos: Add eqos_rockchip_ops

Message ID 20200512095832.29459-1-david.wu@rock-chips.com
State Deferred
Delegated to: Joe Hershberger
Headers show
Series Add dwc_eth_qos support for rockchip | expand

Commit Message

David Wu May 12, 2020, 9:58 a.m. UTC
The eqos_rockchip_ops is simillar to eqos_stm32_ops, and
export the eqos_rockchip_ops to use.

Signed-off-by: David Wu <david.wu@rock-chips.com>
---

Changes in v2:
- None

 drivers/net/dwc_eth_qos.c | 16 ++++++++++++++++
 drivers/net/dwc_eth_qos.h |  2 ++
 2 files changed, 18 insertions(+)

Comments

Patrice CHOTARD May 13, 2020, 8:47 a.m. UTC | #1
HI David

On 5/12/20 11:58 AM, David Wu wrote:
> The eqos_rockchip_ops is simillar to eqos_stm32_ops, and

Typo simillar


> export the eqos_rockchip_ops to use.
>
> Signed-off-by: David Wu <david.wu@rock-chips.com>
> ---
>
> Changes in v2:
> - None
>
>  drivers/net/dwc_eth_qos.c | 16 ++++++++++++++++
>  drivers/net/dwc_eth_qos.h |  2 ++
>  2 files changed, 18 insertions(+)
>
> diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
> index b3195d484e..f4f6f73849 100644
> --- a/drivers/net/dwc_eth_qos.c
> +++ b/drivers/net/dwc_eth_qos.c
> @@ -2147,6 +2147,22 @@ struct eqos_config eqos_imx_config = {
>  	.ops = &eqos_imx_ops
>  };
>  
> +struct eqos_ops eqos_rockchip_ops = {
> +	.eqos_inval_desc = eqos_inval_desc_generic,
> +	.eqos_flush_desc = eqos_flush_desc_generic,
> +	.eqos_inval_buffer = eqos_inval_buffer_generic,
> +	.eqos_flush_buffer = eqos_flush_buffer_generic,
> +	.eqos_probe_resources = eqos_probe_resources_stm32,
> +	.eqos_remove_resources = eqos_remove_resources_stm32,
> +	.eqos_stop_resets = eqos_stop_resets_stm32,
> +	.eqos_start_resets = eqos_start_resets_stm32,
> +	.eqos_calibrate_pads = eqos_calibrate_pads_stm32,
> +	.eqos_disable_calibration = eqos_disable_calibration_stm32,
> +	.eqos_set_tx_clk_speed = eqos_set_tx_clk_speed_stm32,
> +	.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_stm32,
> +	.eqos_get_interface = eqos_get_interface_stm32
> +};
> +
>  static const struct udevice_id eqos_ids[] = {
>  	{
>  		.compatible = "nvidia,tegra186-eqos",
> diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
> index 3125a301f0..def2706271 100644
> --- a/drivers/net/dwc_eth_qos.h
> +++ b/drivers/net/dwc_eth_qos.h
> @@ -84,4 +84,6 @@ int eqos_recv(struct udevice *dev, int flags, uchar **packetp);
>  int eqos_free_pkt(struct udevice *dev, uchar *packet, int length);
>  int eqos_write_hwaddr(struct udevice *dev);
>  
> +extern struct eqos_ops eqos_rockchip_ops;
> +
>  #endif

Reviewed-by: Patrice Chotard <patrice.chotard@st.com>

Thanks
diff mbox series

Patch

diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index b3195d484e..f4f6f73849 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -2147,6 +2147,22 @@  struct eqos_config eqos_imx_config = {
 	.ops = &eqos_imx_ops
 };
 
+struct eqos_ops eqos_rockchip_ops = {
+	.eqos_inval_desc = eqos_inval_desc_generic,
+	.eqos_flush_desc = eqos_flush_desc_generic,
+	.eqos_inval_buffer = eqos_inval_buffer_generic,
+	.eqos_flush_buffer = eqos_flush_buffer_generic,
+	.eqos_probe_resources = eqos_probe_resources_stm32,
+	.eqos_remove_resources = eqos_remove_resources_stm32,
+	.eqos_stop_resets = eqos_stop_resets_stm32,
+	.eqos_start_resets = eqos_start_resets_stm32,
+	.eqos_calibrate_pads = eqos_calibrate_pads_stm32,
+	.eqos_disable_calibration = eqos_disable_calibration_stm32,
+	.eqos_set_tx_clk_speed = eqos_set_tx_clk_speed_stm32,
+	.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_stm32,
+	.eqos_get_interface = eqos_get_interface_stm32
+};
+
 static const struct udevice_id eqos_ids[] = {
 	{
 		.compatible = "nvidia,tegra186-eqos",
diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
index 3125a301f0..def2706271 100644
--- a/drivers/net/dwc_eth_qos.h
+++ b/drivers/net/dwc_eth_qos.h
@@ -84,4 +84,6 @@  int eqos_recv(struct udevice *dev, int flags, uchar **packetp);
 int eqos_free_pkt(struct udevice *dev, uchar *packet, int length);
 int eqos_write_hwaddr(struct udevice *dev);
 
+extern struct eqos_ops eqos_rockchip_ops;
+
 #endif