[v9,16/21] riscv: Allow use of reset drivers

Message ID	20200503023550.326791-17-seanga2@gmail.com
State	Superseded
Delegated to:	Andes
Headers	show Return-Path: <u-boot-bounces@lists.denx.de> From: Sean Anderson <seanga2@gmail.com> To: u-boot@lists.denx.de Cc: Rick Chen <rickchen36@gmail.com>, Bin Meng <bmeng.cn@gmail.com>, Sean Anderson <seanga2@gmail.com> Subject: [PATCH v9 16/21] riscv: Allow use of reset drivers Date: Sat, 2 May 2020 22:35:45 -0400 Message-Id: <20200503023550.326791-17-seanga2@gmail.com> In-Reply-To: <20200503023550.326791-1-seanga2@gmail.com> References: <20200503023550.326791-1-seanga2@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: list Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" <u-boot-bounces@lists.denx.de>
Series	riscv: Add Sipeed Maix support \| expand [v9,00/21] riscv: Add Sipeed Maix support [v9,01/21] clk: Always use the supplied struct clk [v9,02/21] clk: Check that ops of composite clock components exist before calling [v9,03/21] clk: Unconditionally recursively en-/dis-able clocks [v9,04/21] clk: Fix clk_get_by_* handling of index [v9,05/21] clk: Add K210 pll support [v9,06/21] clk: Add a bypass clock for K210 [v9,07/21] clk: Add K210 clock support [v9,08/21] dm: Add support for simple-pm-bus [v9,09/21] dm: Fix error handling for dev_read_addr_ptr [v9,10/21] reset: Add generic reset driver [v9,11/21] lib: Always set errno in hcreate_r [v9,12/21] riscv: Add headers for asm/global_data.h [v9,13/21] riscv: Clear pending interrupts before enabling IPIs [v9,14/21] riscv: Clean up IPI initialization code [v9,15/21] riscv: Add option to support RISC-V privileged spec 1.9 [v9,16/21] riscv: Allow use of reset drivers [v9,17/21] riscv: Try to get cpu frequency from a "clocks" node if it exists [v9,18/21] riscv: Enable cpu clock if it is present [v9,19/21] riscv: Add device tree for K210 and Sipeed Maix BitM [v9,20/21] doc: riscv: Add documentation for Sipeed Maix Bit [v9,21/21] riscv: Add Sipeed Maix support

Message ID

20200503023550.326791-17-seanga2@gmail.com

State

Superseded

Delegated to:

Andes

Headers

From: Sean Anderson <seanga2@gmail.com>
To: u-boot@lists.denx.de
Cc: Rick Chen <rickchen36@gmail.com>, Bin Meng <bmeng.cn@gmail.com>,
 Sean Anderson <seanga2@gmail.com>
Subject: [PATCH v9 16/21] riscv: Allow use of reset drivers
Date: Sat,  2 May 2020 22:35:45 -0400
Message-Id: <20200503023550.326791-17-seanga2@gmail.com>
In-Reply-To: <20200503023550.326791-1-seanga2@gmail.com>
References: <20200503023550.326791-1-seanga2@gmail.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: list
Errors-To: u-boot-bounces@lists.denx.de
Sender: "U-Boot" <u-boot-bounces@lists.denx.de>

Series

riscv: Add Sipeed Maix support | expand

Commit Message

Sean Anderson May 3, 2020, 2:35 a.m. UTC

Currently, one cannot use a reset driver on RISC-V. Follow the MIPS
example, and disable the default reset handler when the sysreset driver is
enabled.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---

Changes in v3:
- New

 arch/riscv/lib/reset.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/riscv/lib/reset.c b/arch/riscv/lib/reset.c
index ce3c1cf872..7622e5df43 100644
--- a/arch/riscv/lib/reset.c
+++ b/arch/riscv/lib/reset.c
@@ -7,6 +7,7 @@ 
 #include <command.h>
 #include <hang.h>
 
+#ifndef CONFIG_SYSRESET
 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	printf("resetting ...\n");
@@ -16,3 +17,4 @@  int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	return 0;
 }
+#endif

[v9,16/21] riscv: Allow use of reset drivers

Commit Message

Patch