new file mode 100644
@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: (GPL-2.0+)
+/*
+ * Copyright (C) 2020 Harald Seiler <hws@denx.de>
+ */
+
+#include "imx6qdl-dhcom-pdk2-u-boot.dtsi"
@@ -3,6 +3,8 @@
* Copyright (C) 2019 Claudius Heine <ch@denx.de>
*/
+#include "imx6qdl-dhcom-pdk2-u-boot.dtsi"
+
/ {
wdt-reboot {
compatible = "wdt-reboot";
new file mode 100644
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0+)
+/*
+ * Copyright (C) 2020 Harald Seiler <hws@denx.de>
+ */
+
+/ {
+ fec_vio: regulator-fec {
+ compatible = "regulator-fixed";
+
+ regulator-name = "fec-vio";
+ gpio = <&gpio1 7 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&fec {
+ phy-reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <1>;
+ phy-reset-post-delay = <10>;
+
+ phy-supply = <&fec_vio>;
+};
@@ -28,10 +28,7 @@
#include <fsl_esdhc_imx.h>
#include <fuse.h>
#include <i2c_eeprom.h>
-#include <miiphy.h>
#include <mmc.h>
-#include <net.h>
-#include <netdev.h>
#include <usb.h>
#include <usb/ehci-ci.h>
@@ -52,24 +49,6 @@ int overwrite_console(void)
return 1;
}
-#ifdef CONFIG_FEC_MXC
-static void eth_phy_reset(void)
-{
- /* Reset PHY */
- gpio_direction_output(IMX_GPIO_NR(5, 0) , 0);
- udelay(500);
- gpio_set_value(IMX_GPIO_NR(5, 0), 1);
-
- /* Enable VIO */
- gpio_direction_output(IMX_GPIO_NR(1, 7) , 0);
-
- /*
- * KSZ9021 PHY needs at least 10 mSec after PHY reset
- * is released to stabilize
- */
- mdelay(10);
-}
-
static int setup_fec_clock(void)
{
struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
@@ -80,34 +59,6 @@ static int setup_fec_clock(void)
return enable_fec_anatop_clock(0, ENET_50MHZ);
}
-int board_eth_init(bd_t *bis)
-{
- uint32_t base = IMX_FEC_BASE;
- struct mii_dev *bus = NULL;
- struct phy_device *phydev = NULL;
-
- gpio_request(IMX_GPIO_NR(5, 0), "PHY-reset");
- gpio_request(IMX_GPIO_NR(1, 7), "VIO");
-
- setup_fec_clock();
-
- eth_phy_reset();
-
- bus = fec_get_miibus(base, -1);
- if (!bus)
- return -EINVAL;
-
- /* Scan PHY 0 */
- phydev = phy_find_by_mask(bus, 0xf, PHY_INTERFACE_MODE_RGMII);
- if (!phydev) {
- printf("Ethernet PHY not found!\n");
- return -EINVAL;
- }
-
- return fec_probe(bis, -1, base, bus, phydev);
-}
-#endif
-
#ifdef CONFIG_USB_EHCI_MX6
static void setup_usb(void)
{
@@ -190,6 +141,8 @@ int board_init(void)
setup_dhcom_mac_from_fuse();
+ setup_fec_clock();
+
return 0;
}
@@ -74,6 +74,8 @@ CONFIG_SPI_FLASH_MTD=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y
Use DM_ETH instead of legacy networking. Add VIO as a fixed regulator to the relevant device-trees and augment the FEC node with properties for the reset GPIO. It should be noted that the relevant properties for the reset GPIO already exist in the PHY node (reset-gpios, reset-delay-us, reset-post-delay-us) but U-Boot currently ignores those and only supports the bus-level reset properties in the FEC node (phy-reset-gpios, phy-reset-duration, phy-reset-post-delay). Signed-off-by: Harald Seiler <hws@denx.de> --- Notes: Changes in v2: - Move reset and VIO to device-tree. - Always enable the clock, not just if CONFIG_FEC_MXC=y. Changes in v3: - Rename the dt file to imx6qdl-dhcom-pdk2-u-boot.dtsi because the PHY is pdk2 specific. - More verbose commit message. Changes in v4: - Remove regulator-always-on. - Change ACTIVE_HIGH to ACTIVE_LOW to properly reflect the non-DM code. arch/arm/dts/imx6dl-dhcom-pdk2-u-boot.dtsi | 6 +++ arch/arm/dts/imx6q-dhcom-pdk2-u-boot.dtsi | 2 + arch/arm/dts/imx6qdl-dhcom-pdk2-u-boot.dtsi | 21 +++++++++ board/dhelectronics/dh_imx6/dh_imx6.c | 51 +-------------------- configs/dh_imx6_defconfig | 2 + 5 files changed, 33 insertions(+), 49 deletions(-) create mode 100644 arch/arm/dts/imx6dl-dhcom-pdk2-u-boot.dtsi create mode 100644 arch/arm/dts/imx6qdl-dhcom-pdk2-u-boot.dtsi