From patchwork Wed Apr 15 09:00:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ley Foon Tan X-Patchwork-Id: 1271018 X-Patchwork-Delegate: simon.k.r.goldschmidt@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 492GZN3hfLz9s71 for ; Wed, 15 Apr 2020 19:02:04 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id A5931819F3; Wed, 15 Apr 2020 11:01:13 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 0BD64819DF; Wed, 15 Apr 2020 11:00:56 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id A86D6819DC for ; Wed, 15 Apr 2020 11:00:45 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=ley.foon.tan@intel.com IronPort-SDR: XEoVvQy6UndOehUowibZ2WZvDQb9HfdC+qdS9+ZNsPGOD4ukHH61xPGj/FuGJ9gP6ywqMBnvg5 EH8Ia3mAT1wQ== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Apr 2020 02:00:45 -0700 IronPort-SDR: JE6P1y9TRRjakBEsXVXfmJTtqaZfr5p8lGytARPHlTkd/leJHN/1mI2Rm0s8cehbN87f7PAEzL zitH8rFNF/Pg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,386,1580803200"; d="scan'208";a="244051776" Received: from ppglcf0015.png.intel.com ([10.226.229.35]) by fmsmga007.fm.intel.com with ESMTP; 15 Apr 2020 02:00:43 -0700 From: Ley Foon Tan To: u-boot@lists.denx.de Cc: Marek Vasut , Ley Foon Tan , Chin Liang See , Simon Goldschmidt , Tien Fong Chee , Ley Foon Tan Subject: [PATCH 5/7] ddr: altera: arria10: Add RAM size check Date: Wed, 15 Apr 2020 17:00:28 +0800 Message-Id: <20200415090030.128489-6-ley.foon.tan@intel.com> X-Mailer: git-send-email 2.19.0 In-Reply-To: <20200415090030.128489-1-ley.foon.tan@intel.com> References: <20200415090030.128489-1-ley.foon.tan@intel.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean Add call to get_ram_size() function to check memory range for valid RAM. Signed-off-by: Ley Foon Tan --- drivers/ddr/altera/sdram_arria10.c | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/drivers/ddr/altera/sdram_arria10.c b/drivers/ddr/altera/sdram_arria10.c index 6b74423ea789..e3f11984a978 100644 --- a/drivers/ddr/altera/sdram_arria10.c +++ b/drivers/ddr/altera/sdram_arria10.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -17,7 +18,7 @@ #include #include #include -#include +#include #include "sdram_arria10.h" @@ -671,6 +672,27 @@ static int ddr_calibration_sequence(struct altera_sdram_platdata *plat) return 0; } +static void sdram_size_check(struct ram_info *ram) +{ + phys_size_t ram_check = 0; + phys_size_t size = ram->size; + phys_addr_t base = ram->base; + + debug("DDR: Running SDRAM size sanity check\n"); + + while (ram_check < size) { + ram_check += get_ram_size((void *)(base + ram_check), + (phys_size_t)SZ_1G); + } + + if (ram_check != size) { + puts("DDR: SDRAM size check failed!\n"); + hang(); + } + + debug("DDR: SDRAM size check passed!\n"); +} + static int altera_sdram_ofdata_to_platdata(struct udevice *dev) { struct altera_sdram_platdata *plat = dev->platdata; @@ -715,6 +737,7 @@ static int altera_sdram_probe(struct udevice *dev) priv->info.base = gd->bd->bi_dram[0].start; priv->info.size = gd->ram_size; + sdram_size_check(&priv->info); return 0; failed: