diff mbox series

[v6,03/17] riscv: Add _image_binary_end for SPL

Message ID 20200329170538.25449-4-pragnesh.patel@sifive.com
State Superseded
Delegated to: Andes
Headers show
Series RISC-V SiFive FU540 support SPL | expand

Commit Message

Pragnesh Patel March 29, 2020, 5:05 p.m. UTC 
For SPL_SEPARATE_BSS, Device tree will be put at _image_binary_end

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
---
 arch/riscv/cpu/u-boot-spl.lds | 1 +
 1 file changed, 1 insertion(+)

Comments

Bin Meng April 20, 2020, 8:05 a.m. UTC | #1 
On Mon, Mar 30, 2020 at 1:06 AM Pragnesh Patel
<pragnesh.patel@sifive.com> wrote:
>
> For SPL_SEPARATE_BSS, Device tree will be put at _image_binary_end
>
> Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
> Reviewed-by: Anup Patel <anup.patel@wdc.com>
> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
>  arch/riscv/cpu/u-boot-spl.lds | 1 +
>  1 file changed, 1 insertion(+)
>

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
diff mbox series

Patch

diff --git a/arch/riscv/cpu/u-boot-spl.lds b/arch/riscv/cpu/u-boot-spl.lds
index 955dd3106d..d0495ce248 100644
--- a/arch/riscv/cpu/u-boot-spl.lds
+++ b/arch/riscv/cpu/u-boot-spl.lds
@@ -72,6 +72,7 @@  SECTIONS
 	. = ALIGN(4);
 
 	_end = .;
+	_image_binary_end = .;
 
 	.bss : {
 		__bss_start = .;