From patchwork Mon Mar 9 03:37:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joyce Ooi X-Patchwork-Id: 1251161 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48bP7X0Gbxz9sPJ for ; Mon, 9 Mar 2020 14:37:59 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 37BB980E7C; Mon, 9 Mar 2020 04:37:54 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id EAE6C81235; Mon, 9 Mar 2020 04:37:52 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id C78C5801E9 for ; Mon, 9 Mar 2020 04:37:48 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=joyce.ooi@intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Mar 2020 20:37:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,531,1574150400"; d="scan'208";a="241837256" Received: from pg-nxl3.altera.com ([10.142.129.93]) by orsmga003.jf.intel.com with ESMTP; 08 Mar 2020 20:37:44 -0700 From: "Ooi, Joyce" To: Ley Foon Tan , Chee Hong Ang , Chin-Liang See , Dinh Nguyen Cc: u-boot@lists.denx.de, Joyce Ooi Subject: [PATCH] arm: socfpga: increase QSPI kernel Image size for Stratix10 and Agilex Date: Mon, 9 Mar 2020 11:37:37 +0800 Message-Id: <20200309033737.17232-1-joyce.ooi@intel.com> X-Mailer: git-send-email 2.13.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean From: Joyce Ooi This patch increases the allocated kernel Image size to 32MB for QSPI for Stratix10 and Agilex as the latest kernel size has increased. Signed-off-by: Joyce Ooi Reviewed-by: Ley Foon Tan --- include/configs/socfpga_agilex_socdk.h | 8 ++++---- include/configs/socfpga_stratix10_socdk.h | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/include/configs/socfpga_agilex_socdk.h b/include/configs/socfpga_agilex_socdk.h index 6a90ce6..4bb2e8f 100644 --- a/include/configs/socfpga_agilex_socdk.h +++ b/include/configs/socfpga_agilex_socdk.h @@ -78,7 +78,7 @@ #ifdef CONFIG_ENV_IS_IN_SPI_FLASH #undef CONFIG_ENV_OFFSET #undef CONFIG_ENV_SIZE -#define CONFIG_ENV_OFFSET 0x02080000 +#define CONFIG_ENV_OFFSET 0x020C0000 #define CONFIG_ENV_SIZE (64 * 1024) #define CONFIG_ENV_SECT_SIZE (64 * 1024) #endif /* CONFIG_ENV_IS_IN_SPI_FLASH */ @@ -120,9 +120,9 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_BOOTARGS "earlycon" #define CONFIG_EXTRA_ENV_SETTINGS \ - "qspibootimageaddr=0x020B0000\0" \ - "qspifdtaddr=0x02090000\0" \ - "bootimagesize=0x01400000\0" \ + "qspibootimageaddr=0x020E0000\0" \ + "qspifdtaddr=0x020D0000\0" \ + "bootimagesize=0x01F00000\0" \ "fdtimagesize=0x00010000\0" \ "qspiload=sf read ${loadaddr} ${qspibootimageaddr} ${bootimagesize};" \ "sf read ${fdt_addr} ${qspifdtaddr} ${fdtimagesize}\0" \ diff --git a/include/configs/socfpga_stratix10_socdk.h b/include/configs/socfpga_stratix10_socdk.h index 28fb546..1c41fc4 100644 --- a/include/configs/socfpga_stratix10_socdk.h +++ b/include/configs/socfpga_stratix10_socdk.h @@ -78,7 +78,7 @@ #ifdef CONFIG_ENV_IS_IN_SPI_FLASH #undef CONFIG_ENV_OFFSET #undef CONFIG_ENV_SIZE -#define CONFIG_ENV_OFFSET 0x02080000 +#define CONFIG_ENV_OFFSET 0x020C0000 #define CONFIG_ENV_SIZE (64 * 1024) #define CONFIG_ENV_SECT_SIZE (64 * 1024) #endif /* CONFIG_ENV_IS_IN_SPI_FLASH */ @@ -116,9 +116,9 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #endif #define CONFIG_EXTRA_ENV_SETTINGS \ - "qspibootimageaddr=0x020B0000\0" \ - "qspifdtaddr=0x02090000\0" \ - "bootimagesize=0x01400000\0" \ + "qspibootimageaddr=0x020E0000\0" \ + "qspifdtaddr=0x020D0000\0" \ + "bootimagesize=0x01F00000\0" \ "fdtimagesize=0x00010000\0" \ "qspiload=sf read ${loadaddr} ${qspibootimageaddr} ${bootimagesize};" \ "sf read ${fdt_addr} ${qspifdtaddr} ${fdtimagesize}\0" \