diff mbox series

ARM: socfpga: Enable DM RTC bootcount on ABB SECU1

Message ID 20200306205221.64130-1-marex@denx.de
State Accepted
Commit 8876f89640d3386822025f42b60b1ff9dd679123
Delegated to: Simon Goldschmidt
Headers show
Series ARM: socfpga: Enable DM RTC bootcount on ABB SECU1 | expand

Commit Message

Marek Vasut March 6, 2020, 8:52 p.m. UTC
Add and enable RTC-backed boot counter on ABB SECU1 platform.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
---
 arch/arm/dts/socfpga_arria5_secu1.dts | 6 ++++++
 configs/socfpga_secu1_defconfig       | 5 +++++
 2 files changed, 11 insertions(+)

Comments

Tan, Ley Foon March 9, 2020, 12:49 a.m. UTC | #1
> -----Original Message-----
> From: Marek Vasut <marex@denx.de>
> Sent: Saturday, March 7, 2020 4:52 AM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut <marex@denx.de>; Tan, Ley Foon
> <ley.foon.tan@intel.com>; Simon Goldschmidt
> <simon.k.r.goldschmidt@gmail.com>
> Subject: [PATCH] ARM: socfpga: Enable DM RTC bootcount on ABB SECU1
> 
> Add and enable RTC-backed boot counter on ABB SECU1 platform.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>

Regards
Ley Foon
diff mbox series

Patch

diff --git a/arch/arm/dts/socfpga_arria5_secu1.dts b/arch/arm/dts/socfpga_arria5_secu1.dts
index dadf766682..820e29ad6d 100644
--- a/arch/arm/dts/socfpga_arria5_secu1.dts
+++ b/arch/arm/dts/socfpga_arria5_secu1.dts
@@ -31,6 +31,12 @@ 
 		spi0 = &spi1;
 	};
 
+	bootcount@0 {
+		compatible = "u-boot,bootcount-rtc";
+		rtc = <&rtc>;
+		offset = <0x9e>;
+	};
+
 	i2c_gpio: i2c@0 {
 		compatible = "i2c-gpio";
 		#address-cells = <1>;
diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig
index 230959ec86..fcb38f1a41 100644
--- a/configs/socfpga_secu1_defconfig
+++ b/configs/socfpga_secu1_defconfig
@@ -48,6 +48,9 @@  CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 # CONFIG_SPL_BLK is not set
+CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_DM_BOOTCOUNT=y
+CONFIG_DM_BOOTCOUNT_RTC=y
 CONFIG_DWAPB_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
@@ -76,6 +79,8 @@  CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_DM_RESET=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_M41T62=y
 CONFIG_SPI=y
 CONFIG_SPI_MEM=y
 CONFIG_DESIGNWARE_SPI=y