From patchwork Mon Mar 2 14:43:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiko Schocher X-Patchwork-Id: 1247674 X-Patchwork-Delegate: hs@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.a=rsa-sha256 header.s=phobos-20191101 header.b=gVWdk7fz; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48WNFZ6KzTz9sPK for ; Tue, 3 Mar 2020 01:44:18 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D589781011; Mon, 2 Mar 2020 15:44:10 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1583160251; bh=zXru+O/0zTTFTE2hfCm/r6rm2isailxe74Lk6q6M+bI=; h=From:To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From; b=gVWdk7fzMdFKNJ4cUveLqFEkkHViuHiG2+1e6bRtxgY5I3sMh0TKcfzZmORDw0iJn 8teXV1OfSwkaI/hlZJzVK9axJbfObpCJYFDMlpUsWbjXodpLdqXhHG8gUVO1tso8hj H1NWTHi3O41ZVt4aFm3eSIz2kyVDzPPf0QZ2T4bJjH3TWB8TXWOC8yvoSAQknMo1Vy JHI4q+BiryMkTWEG5hvCIt9L7MIGW/6dY9Q721UbTejH2JUwv7tgMXtjVUzc8GKRCy waI9dONMpXqaslLAG9oY1yVkVd02VuEPOB1x+AaEuuQBh4LzJu4VylEtmWL0AonZ74 NdWYUMxWMrbHg== Received: by phobos.denx.de (Postfix, from userid 109) id 14E5E811FC; Mon, 2 Mar 2020 15:44:09 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 5574580E7C for ; Mon, 2 Mar 2020 15:44:05 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=hs@denx.de Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 48WNFJ6W5Cz1qr48; Mon, 2 Mar 2020 15:44:04 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 48WNFJ6DkRz1qwyf; Mon, 2 Mar 2020 15:44:04 +0100 (CET) Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id bWnAd3rMIQWG; Mon, 2 Mar 2020 15:44:02 +0100 (CET) X-Auth-Info: LgwuZJB3Nb5S5njQAJqA8gEsp+yAo1YdiFZjrBJHbh8= Received: from mail-internal.denx.de (p578adb1c.dip0.t-ipconnect.de [87.138.219.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Mon, 2 Mar 2020 15:44:02 +0100 (CET) Received: from pollux.denx.de (pollux [192.168.1.1]) by mail-internal.denx.de (Postfix) with ESMTP id A419018530C; Mon, 2 Mar 2020 15:44:01 +0100 (CET) Received: by pollux.denx.de (Postfix, from userid 515) id 821F01A0069; Mon, 2 Mar 2020 15:44:01 +0100 (CET) From: Heiko Schocher To: u-boot@lists.denx.de Cc: Heiko Schocher , Daniel Schwierzeck , Robert Beckett , Simon Glass Subject: [PATCH v2] bootcounter: add DM support for memory based bootcounter Date: Mon, 2 Mar 2020 15:43:59 +0100 Message-Id: <20200302144400.1866404-1-hs@denx.de> X-Mailer: git-send-email 2.24.1 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean add DM/DTS support for the memory based bootcounter in drivers/bootcount/bootcount.c. Let the old implementation in, so boards which have not yet convert to DM/DTS do not break. Signed-off-by: Heiko Schocher Reviewed-by: Simon Glass --- Travis build: https://travis-ci.org/hsdenx/u-boot-test/builds/657150708 Changes in v2: - add changes requested from Simon Glass - add comment to struct bootcount_mem_priv - change type of singleword from u8 to bool - use dev_read_addr() and dev_read_bool() - use "u-boot,bootcount" for compatible string instead "uboot,bootcount" doc/device-tree-bindings/misc/bootcounter.txt | 21 +++++ drivers/bootcount/Kconfig | 7 ++ drivers/bootcount/Makefile | 1 + drivers/bootcount/bootcount.c | 92 +++++++++++++++++++ 4 files changed, 121 insertions(+) create mode 100644 doc/device-tree-bindings/misc/bootcounter.txt diff --git a/doc/device-tree-bindings/misc/bootcounter.txt b/doc/device-tree-bindings/misc/bootcounter.txt new file mode 100644 index 0000000000..d32fbc37b2 --- /dev/null +++ b/doc/device-tree-bindings/misc/bootcounter.txt @@ -0,0 +1,21 @@ +U-Boot bootcounter Devicetree Binding +===================================== + +The device tree node describes the U-Boot bootcounter +memory based device binding. + +Required properties : + +- compatible : "u-boot,bootcount"; +- single-word : set this, if you have only one word space + for storing the bootcounter. + +Example +------- + +MPC83xx based board: + +bootcount@0x13ff8 { + compatible = "u-boot,bootcount"; + reg = <0x13ff8 0x08>; +}; diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig index 0e506c9ea2..0356f8ba18 100644 --- a/drivers/bootcount/Kconfig +++ b/drivers/bootcount/Kconfig @@ -106,6 +106,13 @@ config DM_BOOTCOUNT_I2C_EEPROM pointing to the underlying i2c eeprom device) and an optional 'offset' property are supported. +config BOOTCOUNT_MEM + bool "Support memory based bootcounter" + help + Enabling Memory based bootcount, typically in a SoC register which + is not cleared on softreset. + compatible = "u-boot,bootcount"; + endmenu endif diff --git a/drivers/bootcount/Makefile b/drivers/bootcount/Makefile index 73ccfb5a08..059d40d16b 100644 --- a/drivers/bootcount/Makefile +++ b/drivers/bootcount/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+ obj-$(CONFIG_BOOTCOUNT_GENERIC) += bootcount.o +obj-$(CONFIG_BOOTCOUNT_MEM) += bootcount.o obj-$(CONFIG_BOOTCOUNT_AT91) += bootcount_at91.o obj-$(CONFIG_BOOTCOUNT_AM33XX) += bootcount_davinci.o obj-$(CONFIG_BOOTCOUNT_RAM) += bootcount_ram.o diff --git a/drivers/bootcount/bootcount.c b/drivers/bootcount/bootcount.c index 7a6d03dcca..655dfaf59c 100644 --- a/drivers/bootcount/bootcount.c +++ b/drivers/bootcount/bootcount.c @@ -8,6 +8,7 @@ #include #include +#if !defined(CONFIG_DM_BOOTCOUNT) /* Now implement the generic default functions */ __weak void bootcount_store(ulong a) { @@ -49,3 +50,94 @@ __weak ulong bootcount_load(void) return raw_bootcount_load(reg); #endif /* defined(CONFIG_SYS_BOOTCOUNT_SINGLEWORD) */ } +#else +#include + +/* + * struct bootcount_mem_priv - private bootcount mem driver data + * + * @base: base address used for bootcounter + * @singleword: if true use only one 32 bit word for bootcounter + */ +struct bootcount_mem_priv { + phys_addr_t base; + bool singleword; +}; + +static int bootcount_mem_get(struct udevice *dev, u32 *a) +{ + struct bootcount_mem_priv *priv = dev_get_priv(dev); + void *reg = (void *)priv->base; + u32 magic = CONFIG_SYS_BOOTCOUNT_MAGIC; + + if (priv->singleword) { + u32 tmp = raw_bootcount_load(reg); + + if ((tmp & 0xffff0000) != (magic & 0xffff0000)) + return -ENODEV; + + *a = (tmp & 0x0000ffff); + } else { + if (raw_bootcount_load(reg + 4) != magic) + return -ENODEV; + + *a = raw_bootcount_load(reg); + } + + return 0; +}; + +static int bootcount_mem_set(struct udevice *dev, const u32 a) +{ + struct bootcount_mem_priv *priv = dev_get_priv(dev); + void *reg = (void *)priv->base; + u32 magic = CONFIG_SYS_BOOTCOUNT_MAGIC; + uintptr_t flush_start = rounddown(priv->base, + CONFIG_SYS_CACHELINE_SIZE); + uintptr_t flush_end; + + if (priv->singleword) { + raw_bootcount_store(reg, (magic & 0xffff0000) | a); + flush_end = roundup(priv->base + 4, + CONFIG_SYS_CACHELINE_SIZE); + } else { + raw_bootcount_store(reg, a); + raw_bootcount_store(reg + 4, magic); + flush_end = roundup(priv->base + 8, + CONFIG_SYS_CACHELINE_SIZE); + } + flush_dcache_range(flush_start, flush_end); + + return 0; +}; + +static const struct bootcount_ops bootcount_mem_ops = { + .get = bootcount_mem_get, + .set = bootcount_mem_set, +}; + +static int bootcount_mem_probe(struct udevice *dev) +{ + struct bootcount_mem_priv *priv = dev_get_priv(dev); + + priv->base = (phys_addr_t)dev_read_addr(dev); + if (dev_read_bool(dev, "single-word")) + priv->singleword = true; + + return 0; +} + +static const struct udevice_id bootcount_mem_ids[] = { + { .compatible = "u-boot,bootcount" }, + { } +}; + +U_BOOT_DRIVER(bootcount_mem) = { + .name = "bootcount-mem", + .id = UCLASS_BOOTCOUNT, + .priv_auto_alloc_size = sizeof(struct bootcount_mem_priv), + .probe = bootcount_mem_probe, + .of_match = bootcount_mem_ids, + .ops = &bootcount_mem_ops, +}; +#endif