diff mbox series

[3/3] imx: imx8mn-evk: enable ethernet

Message ID 20200214160829.27994-3-alifer.wsdm@gmail.com
State Under Review
Delegated to: Stefano Babic
Headers show
Series [1/3] clk: imx: imx8mn: add enet clk | expand

Commit Message

Alifer Moraes Feb. 14, 2020, 4:08 p.m. UTC
Enable ethernet on i.MX 8MN EVK

Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com>
---
 arch/arm/dts/imx8mn-ddr4-evk.dts        |  2 ++
 board/freescale/imx8mn_evk/imx8mn_evk.c | 36 +++++++++++++++++++++++++
 configs/imx8mn_ddr4_evk_defconfig       |  8 ++++++
 include/configs/imx8mn_evk.h            |  2 ++
 4 files changed, 48 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm/dts/imx8mn-ddr4-evk.dts b/arch/arm/dts/imx8mn-ddr4-evk.dts
index 9b2c1727a8..53ce10b13d 100644
--- a/arch/arm/dts/imx8mn-ddr4-evk.dts
+++ b/arch/arm/dts/imx8mn-ddr4-evk.dts
@@ -165,6 +165,8 @@ 
 	pinctrl-0 = <&pinctrl_fec1>;
 	phy-mode = "rgmii-id";
 	phy-handle = <&ethphy0>;
+	phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
+	phy-reset-duration = <10>;
 	fsl,magic-packet;
 	status = "okay";
 
diff --git a/board/freescale/imx8mn_evk/imx8mn_evk.c b/board/freescale/imx8mn_evk/imx8mn_evk.c
index 4f33c0e7c9..9ff1dc8555 100644
--- a/board/freescale/imx8mn_evk/imx8mn_evk.c
+++ b/board/freescale/imx8mn_evk/imx8mn_evk.c
@@ -4,6 +4,10 @@ 
  */
 
 #include <common.h>
+#include <miiphy.h>
+#include <netdev.h>
+#include <asm/arch/clock.h>
+#include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -14,8 +18,40 @@  int dram_init(void)
 	return 0;
 }
 
+#if IS_ENABLED(CONFIG_FEC_MXC)
+static int setup_fec(void)
+{
+	struct iomuxc_gpr_base_regs *gpr =
+		(struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
+
+	/* Use 125M anatop REF_CLK1 for ENET1, not from external */
+	clrsetbits_le32(&gpr->gpr[1], 0x2000, 0);
+
+	return 0;
+}
+
+int board_phy_config(struct phy_device *phydev)
+{
+	/* enable rgmii rxc skew and phy mode select to RGMII copper */
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
+
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
+
+	if (phydev->drv->config)
+		phydev->drv->config(phydev);
+	return 0;
+}
+#endif
+
 int board_init(void)
 {
+	if (IS_ENABLED(CONFIG_FEC_MXC))
+		setup_fec();
+
 	return 0;
 }
 
diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig
index e3f99896a6..0e21283d58 100644
--- a/configs/imx8mn_ddr4_evk_defconfig
+++ b/configs/imx8mn_ddr4_evk_defconfig
@@ -43,6 +43,9 @@  CONFIG_CMD_FUSE=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_REGULATOR=y
 CONFIG_CMD_EXT2=y
@@ -67,7 +70,12 @@  CONFIG_DM_MMC=y
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_FSL_ESDHC_IMX=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
+CONFIG_FEC_MXC=y
+CONFIG_MII=y
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_IMX8M=y
diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h
index ce73ca6b0a..bfc1a55637 100644
--- a/include/configs/imx8mn_evk.h
+++ b/include/configs/imx8mn_evk.h
@@ -149,4 +149,6 @@ 
 
 #define CONFIG_SYS_I2C_SPEED		100000
 
+#define FEC_QUIRK_ENET_MAC
+
 #endif