From patchwork Tue Feb 4 11:09:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 1233267 X-Patchwork-Delegate: van.freenix@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=socionext.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=nifty.com header.i=@nifty.com header.a=rsa-sha256 header.s=dec2015msa header.b=IRDWfu8p; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48BhnY1GVxzB3wc for ; Tue, 4 Feb 2020 22:10:41 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id A55DE81ACD; Tue, 4 Feb 2020 12:09:55 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=socionext.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=nifty.com header.i=@nifty.com header.b="IRDWfu8p"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 16EA781AC6; Tue, 4 Feb 2020 12:09:53 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from conuserg-09.nifty.com (conuserg-09.nifty.com [210.131.2.76]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id C69C581AB9 for ; Tue, 4 Feb 2020 12:09:48 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=socionext.com Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=yamada.masahiro@socionext.com Received: from localhost.localdomain (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-09.nifty.com with ESMTP id 014B9BUO007945; Tue, 4 Feb 2020 20:09:19 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-09.nifty.com 014B9BUO007945 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1580814559; bh=Qlm9xfYvaFXZJd2zRsG6V+J4TFIiXnhpBE1D8PtZebU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IRDWfu8pItKgSdFZCoYHV8CtruBwfpq+NVgzkE3UsHI2zhB1vhqkM4N0V/ZkEwRU4 s14BE4276tj9Gy3x+p7HdEQOg7cNBworQ5pyxOtZdkpHldf+Y+rHMZd4zm8d6aHWoc U3fm0cTWNnrJRpKcofZYnXHilJUrwwiPeA7BYDk4UB26/Nrg3LoQS6NXUUNeqO07Ra mu5q1gYlIzb2bvFPsg4j7EEMfhAaEIvoTUc51HyWg2fFvCklV/OUI1iYuB2kVoNTut yCaoYFisNvvbD5J1Xu8ZAHwVJCPjxxgWbkqcnY+XTE0F3q7ALWfP9fCcoye7i/NXxy 9d9Ixfuq9zt/A== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Subject: [PATCH 8/9] mmc: sdhci: use dma_map_single() instead of flush_cache() before DMA Date: Tue, 4 Feb 2020 20:09:05 +0900 Message-Id: <20200204110906.9377-9-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200204110906.9377-1-yamada.masahiro@socionext.com> References: <20200204110906.9377-1-yamada.masahiro@socionext.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.26 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.101.4 at phobos.denx.de X-Virus-Status: Clean Currently, sdhci_prepare_dma() calls flush_cache() regardless of the DMA direction. Actually, cache invalidation is enough when reading data from the device. This is correctly handled by dma_map_single(), which mimics the DMA-API in Linux kernel. Drivers can be agnostic which cache operation occurs behind the scene. This commit also sanitizes the difference between the virtual address and the dma address. Signed-off-by: Masahiro Yamada --- drivers/mmc/sdhci.c | 51 ++++++++++++++++++++++----------------------- 1 file changed, 25 insertions(+), 26 deletions(-) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index ee54d78a28f2..193f402b516f 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -15,6 +15,7 @@ #include #include #include +#include static void sdhci_reset(struct sdhci_host *host, u8 mask) { @@ -65,8 +66,8 @@ static void sdhci_transfer_pio(struct sdhci_host *host, struct mmc_data *data) } #if CONFIG_IS_ENABLED(MMC_SDHCI_ADMA) -static void sdhci_adma_desc(struct sdhci_host *host, char *buf, u16 len, - bool end) +static void sdhci_adma_desc(struct sdhci_host *host, dma_addr_t dma_addr, + u16 len, bool end) { struct sdhci_adma_desc *desc; u8 attr; @@ -82,9 +83,9 @@ static void sdhci_adma_desc(struct sdhci_host *host, char *buf, u16 len, desc->attr = attr; desc->len = len; desc->reserved = 0; - desc->addr_lo = (dma_addr_t)buf; + desc->addr_lo = lower_32_bits(dma_addr); #ifdef CONFIG_DMA_ADDR_T_64BIT - desc->addr_hi = (u64)buf >> 32; + desc->addr_hi = upper_32_bits(dma_addr); #endif } @@ -94,22 +95,17 @@ static void sdhci_prepare_adma_table(struct sdhci_host *host, uint trans_bytes = data->blocksize * data->blocks; uint desc_count = DIV_ROUND_UP(trans_bytes, ADMA_MAX_LEN); int i = desc_count; - char *buf; + dma_addr_t dma_addr = host->start_addr; host->desc_slot = 0; - if (data->flags & MMC_DATA_READ) - buf = data->dest; - else - buf = (char *)data->src; - while (--i) { - sdhci_adma_desc(host, buf, ADMA_MAX_LEN, false); - buf += ADMA_MAX_LEN; + sdhci_adma_desc(host, dma_addr, ADMA_MAX_LEN, false); + dma_addr += ADMA_MAX_LEN; trans_bytes -= ADMA_MAX_LEN; } - sdhci_adma_desc(host, buf, trans_bytes, true); + sdhci_adma_desc(host, dma_addr, trans_bytes, true); flush_cache((dma_addr_t)host->adma_desc_table, ROUND(desc_count * sizeof(struct sdhci_adma_desc), @@ -125,11 +121,12 @@ static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data, int *is_aligned, int trans_bytes) { unsigned char ctrl; + void *buf; if (data->flags == MMC_DATA_READ) - host->start_addr = (dma_addr_t)data->dest; + buf = data->dest; else - host->start_addr = (dma_addr_t)data->src; + buf = (void *)data->src; ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); ctrl &= ~SDHCI_CTRL_DMA_MASK; @@ -139,16 +136,20 @@ static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data, ctrl |= SDHCI_CTRL_ADMA32; sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); + if (host->flags & USE_SDMA && + (host->force_align_buffer || + (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR && + ((unsigned long)buf & 0x7) != 0x0))) { + *is_aligned = 0; + if (data->flags != MMC_DATA_READ) + memcpy(host->align_buffer, buf, trans_bytes); + buf = host->align_buffer; + } + + host->start_addr = dma_map_single(buf, trans_bytes, + mmc_get_dma_dir(data)); + if (host->flags & USE_SDMA) { - if (host->force_align_buffer || - (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR && - (host->start_addr & 0x7) != 0x0)) { - *is_aligned = 0; - host->start_addr = (unsigned long)host->align_buffer; - if (data->flags != MMC_DATA_READ) - memcpy(host->align_buffer, data->src, - trans_bytes); - } sdhci_writel(host, host->start_addr, SDHCI_DMA_ADDRESS); } else if (host->flags & (USE_ADMA | USE_ADMA64)) { sdhci_prepare_adma_table(host, data); @@ -159,8 +160,6 @@ static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data, sdhci_writel(host, upper_32_bits(host->adma_addr), SDHCI_ADMA_ADDRESS_HI); } - - flush_cache(host->start_addr, ROUND(trans_bytes, ARCH_DMA_MINALIGN)); } #else static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data,