diff mbox series

ARM: dts: sunxi: Sync R40 dts(i) from v5.4

Message ID 20200121083512.30133-1-jagan@amarulasolutions.com
State Rejected
Delegated to: Jagannadha Sutradharudu Teki
Headers show
Series ARM: dts: sunxi: Sync R40 dts(i) from v5.4 | expand

Commit Message

Jagan Teki Jan. 21, 2020, 8:35 a.m. UTC
Sync R40 dts(i) files from linux-next v5.4 tag.

This sync would update r40 dts(i) and v40-bananapi-m2-berry
dts files.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts |   7 +-
 arch/arm/dts/sun8i-r40.dtsi                  |  24 ++--
 arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts | 135 ++++++++++++++++---
 3 files changed, 136 insertions(+), 30 deletions(-)

Comments

André Przywara Jan. 21, 2020, 10:33 a.m. UTC | #1
On Tue, 21 Jan 2020 14:05:12 +0530
Jagan Teki <jagan@amarulasolutions.com> wrote:

Hi Jagan,

thanks for taking care of this.

> Sync R40 dts(i) files from linux-next v5.4 tag.

Why this tag? Shouldn't it be just the v5.4 release tag?
But honestly we should take the latest from Maxime's sunxi/for-next branch. This isn't merged into mainline yet, but has been reviewed by the community and committed by Maxime, which is usually as good as it gets. This would avoid doing this exercise in a month again, especially since there are some fixes to the R40 .dtsi in there.

> This sync would update r40 dts(i) and v40-bananapi-m2-berry
> dts files.

So thanks for bringing this up, but see below:

> 
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts |   7 +-
>  arch/arm/dts/sun8i-r40.dtsi                  |  24 ++--
>  arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts | 135 ++++++++++++++++---
>  3 files changed, 136 insertions(+), 30 deletions(-)
> 
> diff --git a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
> index c488aaacbd..42d62d1ba1 100644
> --- a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
> +++ b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
> @@ -201,10 +201,15 @@
>  &pio {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&clk_out_a_pin>;
> +	vcc-pa-supply = <&reg_aldo2>;
> +	vcc-pc-supply = <&reg_dcdc1>;
> +	vcc-pd-supply = <&reg_dcdc1>;
> +	vcc-pe-supply = <&reg_eldo1>;
> +	vcc-pf-supply = <&reg_dcdc1>;
> +	vcc-pg-supply = <&reg_dldo1>;
>  };
>  
>  &reg_aldo2 {
> -	regulator-always-on;
>  	regulator-min-microvolt = <2500000>;
>  	regulator-max-microvolt = <2500000>;
>  	regulator-name = "vcc-pa";
> diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi
> index 06b685869f..c9c2688db6 100644
> --- a/arch/arm/dts/sun8i-r40.dtsi
> +++ b/arch/arm/dts/sun8i-r40.dtsi
> @@ -119,10 +119,10 @@
>  			compatible = "allwinner,sun8i-r40-de2-clk",
>  				     "allwinner,sun8i-h3-de2-clk";
>  			reg = <0x01000000 0x100000>;
> -			clocks = <&ccu CLK_DE>,
> -				 <&ccu CLK_BUS_DE>;
> -			clock-names = "mod",
> -				      "bus";
> +			clocks = <&ccu CLK_BUS_DE>,
> +				 <&ccu CLK_DE>;
> +			clock-names = "bus",
> +				      "mod";
>  			resets = <&ccu RST_BUS_DE>;
>  			#clock-cells = <1>;
>  			#reset-cells = <1>;
> @@ -322,8 +322,7 @@
>  		};
>  
>  		rtc: rtc@1c20400 {
> -			compatible = "allwinner,sun8i-r40-rtc",
> -				     "allwinner,sun8i-h3-rtc";
> +			compatible = "allwinner,sun8i-r40-rtc";

This is an example where the kernel DT changed in a slightly incompatible way.
It removes the H3 RTC string, so any kernels before v5.3 won't recognise the RTC anymore. This is an issue for EFI booting, especially distro installers.

From the pure RTC perspective it seems feasible to just keep the H3 fallback, but this brings issues with the new clock that's derived from the compatible as well.
So we need to test a few older kernels with the new and probably amended DT (where we sync the kernel DT, but skip this one change).
I did a similar exercise in the past with some A64 and H5 boards, and found some issues, which is the reason I didn't send an update yet.

But maybe doing this for the R40 is a good exercise, because it has a more limited scope (only two boards in U-Boot), and the changes are minimal.
Do you have access to the M2 Ultra? I have the M2 Berry, so I would test some older kernels, to identify problematic versions (for instance v5.2/v5.3). Maybe you could verify any solutions on the M2 Ultra then.

Cheers,
Andre

>  			reg = <0x01c20400 0x400>;
>  			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
>  			clock-output-names = "osc32k", "osc32k-out";
> @@ -409,6 +408,8 @@
>  		wdt: watchdog@1c20c90 {
>  			compatible = "allwinner,sun4i-a10-wdt";
>  			reg = <0x01c20c90 0x10>;
> +			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&osc24M>;
>  		};
>  
>  		uart0: serial@1c28000 {
> @@ -562,9 +563,7 @@
>  			interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&ccu CLK_BUS_SATA>, <&ccu CLK_SATA>;
>  			resets = <&ccu RST_BUS_SATA>;
> -			resets-name = "ahci";
> -			#address-cells = <1>;
> -			#size-cells = <0>;
> +			reset-names = "ahci";
>  			status = "disabled";
>  
>  		};
> @@ -614,12 +613,9 @@
>  				#size-cells = <0>;
>  
>  				tcon_top_mixer0_in: port@0 {
> -					#address-cells = <1>;
> -					#size-cells = <0>;
>  					reg = <0>;
>  
> -					tcon_top_mixer0_in_mixer0: endpoint@0 {
> -						reg = <0>;
> +					tcon_top_mixer0_in_mixer0: endpoint {
>  						remote-endpoint = <&mixer0_out_tcon_top>;
>  					};
>  				};
> @@ -818,7 +814,7 @@
>  			resets = <&ccu RST_BUS_HDMI1>;
>  			reset-names = "ctrl";
>  			phys = <&hdmi_phy>;
> -			phy-names = "hdmi-phy";
> +			phy-names = "phy";
>  			status = "disabled";
>  
>  			ports {
> diff --git a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
> index 54ad4db468..15c22b06fc 100644
> --- a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
> +++ b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
> @@ -50,6 +50,7 @@
>  	compatible = "sinovoip,bpi-m2-berry", "allwinner,sun8i-r40";
>  
>  	aliases {
> +		ethernet0 = &gmac;
>  		serial0 = &uart0;
>  	};
>  
> @@ -57,6 +58,17 @@
>  		stdout-path = "serial0:115200n8";
>  	};
>  
> +	connector {
> +		compatible = "hdmi-connector";
> +		type = "a";
> +
> +		port {
> +			hdmi_con_in: endpoint {
> +				remote-endpoint = <&hdmi_out_con>;
> +			};
> +		};
> +	};
> +
>  	leds {
>  		compatible = "gpio-leds";
>  
> @@ -84,12 +96,18 @@
>  	wifi_pwrseq: wifi_pwrseq {
>  		compatible = "mmc-pwrseq-simple";
>  		reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 WIFI_EN */
> +		clocks = <&ccu CLK_OUTA>;
> +		clock-names = "ext_clock";
>  	};
>  };
>  
>  &ahci {
> -	phy-supply = <&reg_eldo3>;	/* VDD12-SATA */
> -	ahci-supply = <&reg_dldo4>;	/* VDD25-SATA */
> +	ahci-supply = <&reg_dldo4>;
> +	phy-supply = <&reg_eldo3>;
> +	status = "okay";
> +};
> +
> +&de {
>  	status = "okay";
>  };
>  
> @@ -98,6 +116,32 @@
>  	status = "okay";
>  };
>  
> +&gmac {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&gmac_rgmii_pins>;
> +	phy-handle = <&phy1>;
> +	phy-mode = "rgmii";
> +	phy-supply = <&reg_dc1sw>;
> +	status = "okay";
> +};
> +
> +&gmac_mdio {
> +	phy1: ethernet-phy@1 {
> +		compatible = "ethernet-phy-ieee802.3-c22";
> +		reg = <1>;
> +	};
> +};
> +
> +&hdmi {
> +	status = "okay";
> +};
> +
> +&hdmi_out {
> +	hdmi_out_con: endpoint {
> +		remote-endpoint = <&hdmi_con_in>;
> +	};
> +};
> +
>  &i2c0 {
>  	status = "okay";
>  
> @@ -111,6 +155,41 @@
>  
>  #include "axp22x.dtsi"
>  
> +&mmc0 {
> +	vmmc-supply = <&reg_dcdc1>;
> +	bus-width = <4>;
> +	cd-gpios = <&pio 7 13 GPIO_ACTIVE_LOW>; /* PH13 */
> +	status = "okay";
> +};
> +
> +&mmc1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&mmc1_pg_pins>;
> +	vmmc-supply = <&reg_dldo2>;
> +	vqmmc-supply = <&reg_dldo1>;
> +	mmc-pwrseq = <&wifi_pwrseq>;
> +	bus-width = <4>;
> +	non-removable;
> +	status = "okay";
> +};
> +
> +&pio {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&clk_out_a_pin>;
> +	vcc-pa-supply = <&reg_aldo2>;
> +	vcc-pc-supply = <&reg_dcdc1>;
> +	vcc-pd-supply = <&reg_dcdc1>;
> +	vcc-pe-supply = <&reg_eldo1>;
> +	vcc-pf-supply = <&reg_dcdc1>;
> +	vcc-pg-supply = <&reg_dldo1>;
> +};
> +
> +&reg_aldo2 {
> +	regulator-min-microvolt = <2500000>;
> +	regulator-max-microvolt = <2500000>;
> +	regulator-name = "vcc-pa";
> +};
> +
>  &reg_aldo3 {
>  	regulator-always-on;
>  	regulator-min-microvolt = <2700000>;
> @@ -118,6 +197,12 @@
>  	regulator-name = "avcc";
>  };
>  
> +&reg_dc1sw {
> +	regulator-min-microvolt = <3000000>;
> +	regulator-max-microvolt = <3000000>;
> +	regulator-name = "vcc-gmac-phy";
> +};
> +
>  &reg_dcdc1 {
>  	regulator-always-on;
>  	regulator-min-microvolt = <3000000>;
> @@ -152,12 +237,27 @@
>  	regulator-name = "vcc-wifi-io";
>  };
>  
> +/*
> + * Our WiFi chip needs both DLDO2 and DLDO3 to be powered at the same
> + * time, with the two being in sync, to be able to meet maximum power
> + * consumption during transmits. Since this is not really supported
> + * right now, just use the two as always on, and we will fix it later.
> + */
> +
>  &reg_dldo2 {
> +	regulator-always-on;
>  	regulator-min-microvolt = <3300000>;
>  	regulator-max-microvolt = <3300000>;
>  	regulator-name = "vcc-wifi";
>  };
>  
> +&reg_dldo3 {
> +	regulator-always-on;
> +	regulator-min-microvolt = <3300000>;
> +	regulator-max-microvolt = <3300000>;
> +	regulator-name = "vcc-wifi-2";
> +};
> +
>  &reg_dldo4 {
>  	regulator-min-microvolt = <2500000>;
>  	regulator-max-microvolt = <2500000>;
> @@ -170,28 +270,33 @@
>  	regulator-name = "vdd1v2-sata";
>  };
>  
> -&mmc0 {
> -	vmmc-supply = <&reg_dcdc1>;
> -	bus-width = <4>;
> -	cd-gpios = <&pio 7 13 GPIO_ACTIVE_LOW>; /* PH13 */
> +&tcon_tv0 {
>  	status = "okay";
>  };
>  
> -&mmc1 {
> +&uart0 {
>  	pinctrl-names = "default";
> -	pinctrl-0 = <&mmc1_pg_pins>;
> -	vmmc-supply = <&reg_dldo2>;
> -	vqmmc-supply = <&reg_dldo1>;
> -	mmc-pwrseq = <&wifi_pwrseq>;
> -	bus-width = <4>;
> -	non-removable;
> +	pinctrl-0 = <&uart0_pb_pins>;
>  	status = "okay";
>  };
>  
> -&uart0 {
> +&uart3 {
>  	pinctrl-names = "default";
> -	pinctrl-0 = <&uart0_pb_pins>;
> +	pinctrl-0 = <&uart3_pg_pins>, <&uart3_rts_cts_pg_pins>;
> +	uart-has-rtscts;
>  	status = "okay";
> +
> +	bluetooth {
> +		compatible = "brcm,bcm43438-bt";
> +		clocks = <&ccu CLK_OUTA>;
> +		clock-names = "lpo";
> +		vbat-supply = <&reg_dldo2>;
> +		vddio-supply = <&reg_dldo1>;
> +		device-wakeup-gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
> +		/* TODO host wake line connected to PMIC GPIO pins */
> +		shutdown-gpios = <&pio 7 12 GPIO_ACTIVE_HIGH>; /* PH12 */
> +		max-speed = <1500000>;
> +	};
>  };
>  
>  &usbphy {
Jagan Teki Jan. 24, 2020, 6:15 a.m. UTC | #2
Hi Andre,

On Tue, Jan 21, 2020 at 4:03 PM Andre Przywara <andre.przywara@arm.com> wrote:
>
> On Tue, 21 Jan 2020 14:05:12 +0530
> Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> Hi Jagan,
>
> thanks for taking care of this.
>
> > Sync R40 dts(i) files from linux-next v5.4 tag.
>
> Why this tag? Shouldn't it be just the v5.4 release tag?
> But honestly we should take the latest from Maxime's sunxi/for-next branch. This isn't merged into mainline yet, but has been reviewed by the community and committed by Maxime, which is usually as good as it gets. This would avoid doing this exercise in a month again, especially since there are some fixes to the R40 .dtsi in there.

And all Maxime's sunxi changes would first merged into linux-next,
isn't it? Since I usually sync linux-next as it has latest changed
merged.

>
> > This sync would update r40 dts(i) and v40-bananapi-m2-berry
> > dts files.
>
> So thanks for bringing this up, but see below:
>
> >
> > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > ---
> >  arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts |   7 +-
> >  arch/arm/dts/sun8i-r40.dtsi                  |  24 ++--
> >  arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts | 135 ++++++++++++++++---
> >  3 files changed, 136 insertions(+), 30 deletions(-)
> >
> > diff --git a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
> > index c488aaacbd..42d62d1ba1 100644
> > --- a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
> > +++ b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
> > @@ -201,10 +201,15 @@
> >  &pio {
> >       pinctrl-names = "default";
> >       pinctrl-0 = <&clk_out_a_pin>;
> > +     vcc-pa-supply = <&reg_aldo2>;
> > +     vcc-pc-supply = <&reg_dcdc1>;
> > +     vcc-pd-supply = <&reg_dcdc1>;
> > +     vcc-pe-supply = <&reg_eldo1>;
> > +     vcc-pf-supply = <&reg_dcdc1>;
> > +     vcc-pg-supply = <&reg_dldo1>;
> >  };
> >
> >  &reg_aldo2 {
> > -     regulator-always-on;
> >       regulator-min-microvolt = <2500000>;
> >       regulator-max-microvolt = <2500000>;
> >       regulator-name = "vcc-pa";
> > diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi
> > index 06b685869f..c9c2688db6 100644
> > --- a/arch/arm/dts/sun8i-r40.dtsi
> > +++ b/arch/arm/dts/sun8i-r40.dtsi
> > @@ -119,10 +119,10 @@
> >                       compatible = "allwinner,sun8i-r40-de2-clk",
> >                                    "allwinner,sun8i-h3-de2-clk";
> >                       reg = <0x01000000 0x100000>;
> > -                     clocks = <&ccu CLK_DE>,
> > -                              <&ccu CLK_BUS_DE>;
> > -                     clock-names = "mod",
> > -                                   "bus";
> > +                     clocks = <&ccu CLK_BUS_DE>,
> > +                              <&ccu CLK_DE>;
> > +                     clock-names = "bus",
> > +                                   "mod";
> >                       resets = <&ccu RST_BUS_DE>;
> >                       #clock-cells = <1>;
> >                       #reset-cells = <1>;
> > @@ -322,8 +322,7 @@
> >               };
> >
> >               rtc: rtc@1c20400 {
> > -                     compatible = "allwinner,sun8i-r40-rtc",
> > -                                  "allwinner,sun8i-h3-rtc";
> > +                     compatible = "allwinner,sun8i-r40-rtc";
>
> This is an example where the kernel DT changed in a slightly incompatible way.
> It removes the H3 RTC string, so any kernels before v5.3 won't recognise the RTC anymore. This is an issue for EFI booting, especially distro installers.
>
> From the pure RTC perspective it seems feasible to just keep the H3 fallback, but this brings issues with the new clock that's derived from the compatible as well.
> So we need to test a few older kernels with the new and probably amended DT (where we sync the kernel DT, but skip this one change).
> I did a similar exercise in the past with some A64 and H5 boards, and found some issues, which is the reason I didn't send an update yet.

If the installers are trying to use the latest u-boot, can't they use
latest linux versions or so? Otherwise dts sync approach is
incompatibility for those use cases.

>
> But maybe doing this for the R40 is a good exercise, because it has a more limited scope (only two boards in U-Boot), and the changes are minimal.
> Do you have access to the M2 Ultra? I have the M2 Berry, so I would test some older kernels, to identify problematic versions (for instance v5.2/v5.3). Maybe you could verify any solutions on the M2 Ultra then.

Yes, I have. Let me know if you have any specific image to verify.
diff mbox series

Patch

diff --git a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
index c488aaacbd..42d62d1ba1 100644
--- a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
+++ b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
@@ -201,10 +201,15 @@ 
 &pio {
 	pinctrl-names = "default";
 	pinctrl-0 = <&clk_out_a_pin>;
+	vcc-pa-supply = <&reg_aldo2>;
+	vcc-pc-supply = <&reg_dcdc1>;
+	vcc-pd-supply = <&reg_dcdc1>;
+	vcc-pe-supply = <&reg_eldo1>;
+	vcc-pf-supply = <&reg_dcdc1>;
+	vcc-pg-supply = <&reg_dldo1>;
 };
 
 &reg_aldo2 {
-	regulator-always-on;
 	regulator-min-microvolt = <2500000>;
 	regulator-max-microvolt = <2500000>;
 	regulator-name = "vcc-pa";
diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi
index 06b685869f..c9c2688db6 100644
--- a/arch/arm/dts/sun8i-r40.dtsi
+++ b/arch/arm/dts/sun8i-r40.dtsi
@@ -119,10 +119,10 @@ 
 			compatible = "allwinner,sun8i-r40-de2-clk",
 				     "allwinner,sun8i-h3-de2-clk";
 			reg = <0x01000000 0x100000>;
-			clocks = <&ccu CLK_DE>,
-				 <&ccu CLK_BUS_DE>;
-			clock-names = "mod",
-				      "bus";
+			clocks = <&ccu CLK_BUS_DE>,
+				 <&ccu CLK_DE>;
+			clock-names = "bus",
+				      "mod";
 			resets = <&ccu RST_BUS_DE>;
 			#clock-cells = <1>;
 			#reset-cells = <1>;
@@ -322,8 +322,7 @@ 
 		};
 
 		rtc: rtc@1c20400 {
-			compatible = "allwinner,sun8i-r40-rtc",
-				     "allwinner,sun8i-h3-rtc";
+			compatible = "allwinner,sun8i-r40-rtc";
 			reg = <0x01c20400 0x400>;
 			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 			clock-output-names = "osc32k", "osc32k-out";
@@ -409,6 +408,8 @@ 
 		wdt: watchdog@1c20c90 {
 			compatible = "allwinner,sun4i-a10-wdt";
 			reg = <0x01c20c90 0x10>;
+			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&osc24M>;
 		};
 
 		uart0: serial@1c28000 {
@@ -562,9 +563,7 @@ 
 			interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&ccu CLK_BUS_SATA>, <&ccu CLK_SATA>;
 			resets = <&ccu RST_BUS_SATA>;
-			resets-name = "ahci";
-			#address-cells = <1>;
-			#size-cells = <0>;
+			reset-names = "ahci";
 			status = "disabled";
 
 		};
@@ -614,12 +613,9 @@ 
 				#size-cells = <0>;
 
 				tcon_top_mixer0_in: port@0 {
-					#address-cells = <1>;
-					#size-cells = <0>;
 					reg = <0>;
 
-					tcon_top_mixer0_in_mixer0: endpoint@0 {
-						reg = <0>;
+					tcon_top_mixer0_in_mixer0: endpoint {
 						remote-endpoint = <&mixer0_out_tcon_top>;
 					};
 				};
@@ -818,7 +814,7 @@ 
 			resets = <&ccu RST_BUS_HDMI1>;
 			reset-names = "ctrl";
 			phys = <&hdmi_phy>;
-			phy-names = "hdmi-phy";
+			phy-names = "phy";
 			status = "disabled";
 
 			ports {
diff --git a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
index 54ad4db468..15c22b06fc 100644
--- a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
+++ b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
@@ -50,6 +50,7 @@ 
 	compatible = "sinovoip,bpi-m2-berry", "allwinner,sun8i-r40";
 
 	aliases {
+		ethernet0 = &gmac;
 		serial0 = &uart0;
 	};
 
@@ -57,6 +58,17 @@ 
 		stdout-path = "serial0:115200n8";
 	};
 
+	connector {
+		compatible = "hdmi-connector";
+		type = "a";
+
+		port {
+			hdmi_con_in: endpoint {
+				remote-endpoint = <&hdmi_out_con>;
+			};
+		};
+	};
+
 	leds {
 		compatible = "gpio-leds";
 
@@ -84,12 +96,18 @@ 
 	wifi_pwrseq: wifi_pwrseq {
 		compatible = "mmc-pwrseq-simple";
 		reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 WIFI_EN */
+		clocks = <&ccu CLK_OUTA>;
+		clock-names = "ext_clock";
 	};
 };
 
 &ahci {
-	phy-supply = <&reg_eldo3>;	/* VDD12-SATA */
-	ahci-supply = <&reg_dldo4>;	/* VDD25-SATA */
+	ahci-supply = <&reg_dldo4>;
+	phy-supply = <&reg_eldo3>;
+	status = "okay";
+};
+
+&de {
 	status = "okay";
 };
 
@@ -98,6 +116,32 @@ 
 	status = "okay";
 };
 
+&gmac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&gmac_rgmii_pins>;
+	phy-handle = <&phy1>;
+	phy-mode = "rgmii";
+	phy-supply = <&reg_dc1sw>;
+	status = "okay";
+};
+
+&gmac_mdio {
+	phy1: ethernet-phy@1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <1>;
+	};
+};
+
+&hdmi {
+	status = "okay";
+};
+
+&hdmi_out {
+	hdmi_out_con: endpoint {
+		remote-endpoint = <&hdmi_con_in>;
+	};
+};
+
 &i2c0 {
 	status = "okay";
 
@@ -111,6 +155,41 @@ 
 
 #include "axp22x.dtsi"
 
+&mmc0 {
+	vmmc-supply = <&reg_dcdc1>;
+	bus-width = <4>;
+	cd-gpios = <&pio 7 13 GPIO_ACTIVE_LOW>; /* PH13 */
+	status = "okay";
+};
+
+&mmc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc1_pg_pins>;
+	vmmc-supply = <&reg_dldo2>;
+	vqmmc-supply = <&reg_dldo1>;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	bus-width = <4>;
+	non-removable;
+	status = "okay";
+};
+
+&pio {
+	pinctrl-names = "default";
+	pinctrl-0 = <&clk_out_a_pin>;
+	vcc-pa-supply = <&reg_aldo2>;
+	vcc-pc-supply = <&reg_dcdc1>;
+	vcc-pd-supply = <&reg_dcdc1>;
+	vcc-pe-supply = <&reg_eldo1>;
+	vcc-pf-supply = <&reg_dcdc1>;
+	vcc-pg-supply = <&reg_dldo1>;
+};
+
+&reg_aldo2 {
+	regulator-min-microvolt = <2500000>;
+	regulator-max-microvolt = <2500000>;
+	regulator-name = "vcc-pa";
+};
+
 &reg_aldo3 {
 	regulator-always-on;
 	regulator-min-microvolt = <2700000>;
@@ -118,6 +197,12 @@ 
 	regulator-name = "avcc";
 };
 
+&reg_dc1sw {
+	regulator-min-microvolt = <3000000>;
+	regulator-max-microvolt = <3000000>;
+	regulator-name = "vcc-gmac-phy";
+};
+
 &reg_dcdc1 {
 	regulator-always-on;
 	regulator-min-microvolt = <3000000>;
@@ -152,12 +237,27 @@ 
 	regulator-name = "vcc-wifi-io";
 };
 
+/*
+ * Our WiFi chip needs both DLDO2 and DLDO3 to be powered at the same
+ * time, with the two being in sync, to be able to meet maximum power
+ * consumption during transmits. Since this is not really supported
+ * right now, just use the two as always on, and we will fix it later.
+ */
+
 &reg_dldo2 {
+	regulator-always-on;
 	regulator-min-microvolt = <3300000>;
 	regulator-max-microvolt = <3300000>;
 	regulator-name = "vcc-wifi";
 };
 
+&reg_dldo3 {
+	regulator-always-on;
+	regulator-min-microvolt = <3300000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "vcc-wifi-2";
+};
+
 &reg_dldo4 {
 	regulator-min-microvolt = <2500000>;
 	regulator-max-microvolt = <2500000>;
@@ -170,28 +270,33 @@ 
 	regulator-name = "vdd1v2-sata";
 };
 
-&mmc0 {
-	vmmc-supply = <&reg_dcdc1>;
-	bus-width = <4>;
-	cd-gpios = <&pio 7 13 GPIO_ACTIVE_LOW>; /* PH13 */
+&tcon_tv0 {
 	status = "okay";
 };
 
-&mmc1 {
+&uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mmc1_pg_pins>;
-	vmmc-supply = <&reg_dldo2>;
-	vqmmc-supply = <&reg_dldo1>;
-	mmc-pwrseq = <&wifi_pwrseq>;
-	bus-width = <4>;
-	non-removable;
+	pinctrl-0 = <&uart0_pb_pins>;
 	status = "okay";
 };
 
-&uart0 {
+&uart3 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pb_pins>;
+	pinctrl-0 = <&uart3_pg_pins>, <&uart3_rts_cts_pg_pins>;
+	uart-has-rtscts;
 	status = "okay";
+
+	bluetooth {
+		compatible = "brcm,bcm43438-bt";
+		clocks = <&ccu CLK_OUTA>;
+		clock-names = "lpo";
+		vbat-supply = <&reg_dldo2>;
+		vddio-supply = <&reg_dldo1>;
+		device-wakeup-gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
+		/* TODO host wake line connected to PMIC GPIO pins */
+		shutdown-gpios = <&pio 7 12 GPIO_ACTIVE_HIGH>; /* PH12 */
+		max-speed = <1500000>;
+	};
 };
 
 &usbphy {