From patchwork Tue Nov 26 01:39:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Wu X-Patchwork-Id: 1200709 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=rock-chips.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 47MRRR6Yppz9s3Z for ; Tue, 26 Nov 2019 12:40:03 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 8DCE2C21CB6; Tue, 26 Nov 2019 01:40:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.6 required=5.0 tests=RCVD_IN_SORBS_WEB autolearn=no autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 2AAEAC21CB6; Tue, 26 Nov 2019 01:40:00 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 6A172C21CB6; Tue, 26 Nov 2019 01:39:58 +0000 (UTC) Received: from lucky1.263xmail.com (lucky1.263xmail.com [211.157.147.131]) by lists.denx.de (Postfix) with ESMTPS id 884CAC21C27 for ; Tue, 26 Nov 2019 01:39:57 +0000 (UTC) Received: from localhost (unknown [192.168.167.69]) by lucky1.263xmail.com (Postfix) with ESMTP id AAAA46FF48; Tue, 26 Nov 2019 09:39:54 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P29210T140217352697600S1574732392993346_; Tue, 26 Nov 2019 09:39:54 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: X-RL-SENDER: david.wu@rock-chips.com X-SENDER: wdc@rock-chips.com X-LOGIN-NAME: david.wu@rock-chips.com X-FST-TO: u-boot@lists.denx.de X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 From: David Wu To: u-boot@lists.denx.de Date: Tue, 26 Nov 2019 09:39:49 +0800 Message-Id: <20191126013951.17065-1-david.wu@rock-chips.com> X-Mailer: git-send-email 2.19.1 MIME-Version: 1.0 Cc: David Wu Subject: [U-Boot] [PATCH 1/3] net: gmac_rockchip: Add support for rk3308 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add the glue code to allow the rk3308 variant of the Rockchip gmac to provide network functionality. Signed-off-by: David Wu Reviewed-by: Kever Yang --- drivers/net/gmac_rockchip.c | 65 +++++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c index d2c52b4c46..e152faf083 100644 --- a/drivers/net/gmac_rockchip.c +++ b/drivers/net/gmac_rockchip.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -173,6 +174,47 @@ static int rk3288_gmac_fix_mac_speed(struct dw_eth_dev *priv) return 0; } +static int rk3308_gmac_fix_mac_speed(struct dw_eth_dev *priv) +{ + struct rk3308_grf *grf; + struct clk clk_speed; + int speed, ret; + enum { + RK3308_GMAC_SPEED_SHIFT = 0x0, + RK3308_GMAC_SPEED_MASK = BIT(0), + RK3308_GMAC_SPEED_10M = 0, + RK3308_GMAC_SPEED_100M = BIT(0), + }; + + ret = clk_get_by_name(priv->phydev->dev, "clk_mac_speed", + &clk_speed); + if (ret) + return ret; + + switch (priv->phydev->speed) { + case 10: + speed = RK3308_GMAC_SPEED_10M; + ret = clk_set_rate(&clk_speed, 2500000); + if (ret) + return ret; + break; + case 100: + speed = RK3308_GMAC_SPEED_100M; + ret = clk_set_rate(&clk_speed, 25000000); + if (ret) + return ret; + break; + default: + debug("Unknown phy speed: %d\n", priv->phydev->speed); + return -EINVAL; + } + + grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + rk_clrsetreg(&grf->mac_con0, RK3308_GMAC_SPEED_MASK, speed); + + return 0; +} + static int rk3328_gmac_fix_mac_speed(struct dw_eth_dev *priv) { struct rk3328_grf_regs *grf; @@ -377,6 +419,22 @@ static void rk3288_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata) pdata->tx_delay << RK3288_CLK_TX_DL_CFG_GMAC_SHIFT); } +static void rk3308_gmac_set_to_rmii(struct gmac_rockchip_platdata *pdata) +{ + struct rk3308_grf *grf; + enum { + RK3308_GMAC_PHY_INTF_SEL_SHIFT = 2, + RK3308_GMAC_PHY_INTF_SEL_MASK = GENMASK(4, 2), + RK3308_GMAC_PHY_INTF_SEL_RMII = BIT(4), + }; + + grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + + rk_clrsetreg(&grf->mac_con0, + RK3308_GMAC_PHY_INTF_SEL_MASK, + RK3308_GMAC_PHY_INTF_SEL_RMII); +} + static void rk3328_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata) { struct rk3328_grf_regs *grf; @@ -646,6 +704,11 @@ const struct rk_gmac_ops rk3288_gmac_ops = { .set_to_rgmii = rk3288_gmac_set_to_rgmii, }; +const struct rk_gmac_ops rk3308_gmac_ops = { + .fix_mac_speed = rk3308_gmac_fix_mac_speed, + .set_to_rmii = rk3308_gmac_set_to_rmii, +}; + const struct rk_gmac_ops rk3328_gmac_ops = { .fix_mac_speed = rk3328_gmac_fix_mac_speed, .set_to_rgmii = rk3328_gmac_set_to_rgmii, @@ -673,6 +736,8 @@ static const struct udevice_id rockchip_gmac_ids[] = { .data = (ulong)&rk3228_gmac_ops }, { .compatible = "rockchip,rk3288-gmac", .data = (ulong)&rk3288_gmac_ops }, + { .compatible = "rockchip,rk3308-mac", + .data = (ulong)&rk3308_gmac_ops }, { .compatible = "rockchip,rk3328-gmac", .data = (ulong)&rk3328_gmac_ops }, { .compatible = "rockchip,rk3368-gmac",