| Message ID | 20191026002630.25865-9-michael@walle.cc |
|---|---|
| State | Superseded |
| Delegated to: | Joe Hershberger |
| Headers | show |
| Series | phy: atheros: cleanup and device tree bindings | expand |
On Fri, Oct 25, 2019 at 7:29 PM Michael Walle <michael@walle.cc> wrote: > > We can configure the clock output in the device tree. Disable the > hardcoded one in here. This is highly board-specific and should have > never been enabled in the PHY driver. > > If bisecting shows that this commit breaks your board it probably > depends on the clock output of your Atheros AR8035 PHY. Please have a > look at doc/device-tree-bindings/net/phy/atheros.txt. You need to set > "clk-out-frequency = <125000000>" because that value was the hardcoded > value until this commit. > > Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c index 1c8c9b4e75..91fcbf912a 100644 --- a/drivers/net/phy/atheros.c +++ b/drivers/net/phy/atheros.c @@ -273,12 +273,6 @@ static int ar8035_config(struct phy_device *phydev) if (ret < 0) return ret; - ret = phy_read_mmd(phydev, 7, 0x8016); - if (ret < 0) - return ret; - ret |= 0x0018; - phy_write_mmd(phydev, 7, 0x8016, ret); - ret = ar803x_delay_config(phydev); if (ret < 0) return ret;
We can configure the clock output in the device tree. Disable the hardcoded one in here. This is highly board-specific and should have never been enabled in the PHY driver. If bisecting shows that this commit breaks your board it probably depends on the clock output of your Atheros AR8035 PHY. Please have a look at doc/device-tree-bindings/net/phy/atheros.txt. You need to set "clk-out-frequency = <125000000>" because that value was the hardcoded value until this commit. Signed-off-by: Michael Walle <michael@walle.cc> --- drivers/net/phy/atheros.c | 6 ------ 1 file changed, 6 deletions(-)