From patchwork Tue Oct 15 12:54:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Faiz Abbas X-Patchwork-Id: 1177007 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="fttMUAr7"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46swRv3vGFz9sPV for ; Tue, 15 Oct 2019 23:56:59 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 3695DC21EB1; Tue, 15 Oct 2019 12:54:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E6E3DC21E79; Tue, 15 Oct 2019 12:54:25 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 303B9C21E68; Tue, 15 Oct 2019 12:54:12 +0000 (UTC) Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lists.denx.de (Postfix) with ESMTPS id F074EC21E63 for ; Tue, 15 Oct 2019 12:54:08 +0000 (UTC) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9FCs59h108671; Tue, 15 Oct 2019 07:54:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1571144045; bh=jp1JCCgzH0kBetEnz50vAGUBDyFrToraCKLG2+9mK14=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=fttMUAr7yTBdsVjaIKDt+BGl5hwWZOUe/6FclAa0lbpw+FzwInoFu6ueHKxcSojH0 6lE0eEsUJmCTfNglbk/4dk0mtzfBxZVJpbsFDTK0jB+uEi6H+CBtGwShwHzyphoXXb y+gIDObWNTsWTgR9ZLJPRqct+7Lf9Ked1/dhEEnI= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9FCs4om024007 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 15 Oct 2019 07:54:05 -0500 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Tue, 15 Oct 2019 07:53:58 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Tue, 15 Oct 2019 07:53:58 -0500 Received: from a0230074-OptiPlex-7010.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9FCrkKr051438; Tue, 15 Oct 2019 07:54:02 -0500 From: Faiz Abbas To: Date: Tue, 15 Oct 2019 18:24:37 +0530 Message-ID: <20191015125442.1786-7-faiz_abbas@ti.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20191015125442.1786-1-faiz_abbas@ti.com> References: <20191015125442.1786-1-faiz_abbas@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: albert.u.boot@aribaud.net, trini@konsulko.com Subject: [U-Boot] [PATCH v2 06/11] ufs: Add Support for Cadence platform UFS driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add Support for the platform driver for the Cadence device present on TI's J721e device. Signed-off-by: Faiz Abbas --- drivers/ufs/Kconfig | 8 +++ drivers/ufs/Makefile | 1 + drivers/ufs/cdns-platform.c | 122 ++++++++++++++++++++++++++++++++++++ 3 files changed, 131 insertions(+) create mode 100644 drivers/ufs/cdns-platform.c diff --git a/drivers/ufs/Kconfig b/drivers/ufs/Kconfig index b0981062d8..c272074082 100644 --- a/drivers/ufs/Kconfig +++ b/drivers/ufs/Kconfig @@ -6,4 +6,12 @@ config UFS help This selects support for Universal Flash Subsystem (UFS). Say Y here if you want UFS Support. + +config CADENCE_UFS + bool "Cadence platform driver for UFS" + depends on UFS + help + This selects the platform driver for the Cadence UFS host + controller present on present TI's J721e devices. + endmenu diff --git a/drivers/ufs/Makefile b/drivers/ufs/Makefile index b8df759f66..9262bd6cd0 100644 --- a/drivers/ufs/Makefile +++ b/drivers/ufs/Makefile @@ -4,3 +4,4 @@ # obj-$(CONFIG_UFS) += ufs.o ufs-uclass.o +obj-$(CONFIG_CADENCE_UFS) += cdns-platform.o diff --git a/drivers/ufs/cdns-platform.c b/drivers/ufs/cdns-platform.c new file mode 100644 index 0000000000..c80f4253e4 --- /dev/null +++ b/drivers/ufs/cdns-platform.c @@ -0,0 +1,122 @@ +// SPDX-License-Identifier: GPL-2.0+ +/** + * cdns-platform.c - Platform driver for Cadence UFSHCI device + * + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + */ + +#include +#include +#include +#include + +#include "ufs.h" + +#define USEC_PER_SEC 1000000L + +#define CDNS_UFS_REG_HCLKDIV 0xFC +#define CDNS_UFS_REG_PHY_XCFGD1 0x113C + +static int cdns_ufs_link_startup_notify(struct ufs_hba *hba, + enum ufs_notify_change_status status) +{ + hba->quirks |= UFSHCD_QUIRK_BROKEN_LCC; + switch (status) { + case PRE_CHANGE: + return ufshcd_dme_set(hba, + UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), + 0); + case POST_CHANGE: + ; + } + + return 0; +} + +static int cdns_ufs_set_hclkdiv(struct ufs_hba *hba) +{ + struct clk clk; + unsigned long core_clk_rate = 0; + u32 core_clk_div = 0; + int ret; + + ret = clk_get_by_name(hba->dev, "core_clk", &clk); + if (ret) { + dev_err(hba->dev, "failed to get core_clk clock\n"); + return ret; + } + + core_clk_rate = clk_get_rate(&clk); + if (IS_ERR_VALUE(core_clk_rate)) { + dev_err(hba->dev, "%s: unable to find core_clk rate\n", + __func__); + return core_clk_rate; + } + + core_clk_div = core_clk_rate / USEC_PER_SEC; + ufshcd_writel(hba, core_clk_div, CDNS_UFS_REG_HCLKDIV); + + return 0; +} + +static int cdns_ufs_hce_enable_notify(struct ufs_hba *hba, + enum ufs_notify_change_status status) +{ + switch (status) { + case PRE_CHANGE: + return cdns_ufs_set_hclkdiv(hba); + case POST_CHANGE: + ; + } + + return 0; +} + +static int cdns_ufs_init(struct ufs_hba *hba) +{ + u32 data; + + /* Increase RX_Advanced_Min_ActivateTime_Capability */ + data = ufshcd_readl(hba, CDNS_UFS_REG_PHY_XCFGD1); + data |= BIT(24); + ufshcd_writel(hba, data, CDNS_UFS_REG_PHY_XCFGD1); + + return 0; +} + +static struct ufs_hba_ops cdns_pltfm_hba_ops = { + .init = cdns_ufs_init, + .hce_enable_notify = cdns_ufs_hce_enable_notify, + .link_startup_notify = cdns_ufs_link_startup_notify, +}; + +static int cdns_ufs_pltfm_probe(struct udevice *dev) +{ + int err = ufshcd_probe(dev, &cdns_pltfm_hba_ops); + if (err) + dev_err(dev, "ufshcd_probe() failed %d\n", err); + + return err; +} + +static int cdns_ufs_pltfm_bind(struct udevice *dev) +{ + struct udevice *scsi_dev; + + return ufs_scsi_bind(dev, &scsi_dev); +} + +static const struct udevice_id cdns_ufs_pltfm_ids[] = { + { + .compatible = "cdns,ufshc-m31-16nm", + }, + {}, +}; + +U_BOOT_DRIVER(cdns_ufs_pltfm) = { + .name = "cdns-ufs-pltfm", + .id = UCLASS_UFS, + .of_match = cdns_ufs_pltfm_ids, + .probe = cdns_ufs_pltfm_probe, + .bind = cdns_ufs_pltfm_bind, +};