From patchwork Thu Aug 22 16:22:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1151680 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="KHoSCo3Z"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46DqbQ0HSvz9sBp for ; Fri, 23 Aug 2019 02:23:45 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id A7778C220CC; Thu, 22 Aug 2019 16:22:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 4BE45C220B1; Thu, 22 Aug 2019 16:22:27 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id A416BC2206F; Thu, 22 Aug 2019 16:22:25 +0000 (UTC) Received: from mail-wr1-f66.google.com (mail-wr1-f66.google.com [209.85.221.66]) by lists.denx.de (Postfix) with ESMTPS id 45384C22047 for ; Thu, 22 Aug 2019 16:22:25 +0000 (UTC) Received: by mail-wr1-f66.google.com with SMTP id b16so5981658wrq.9 for ; Thu, 22 Aug 2019 09:22:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=L6W6b2WwJjJRa5I/RuOzEdaIPUukeUfVHD6x02JRqtI=; b=KHoSCo3ZtJTSzxY9iyaPKnIzfdSOBEhHa10D30LVl/ii4mYPNDSkElslW/NU0lqnG9 QPMAYEsUTC3FTplYPVlE7smjXyX26OAdxU8DkdZ5UEZWwlgerAlhxewi9Fe4J3RFXGee ntARsSubbr3uBgQJVx6zk1Bq0S39RJQWBfN1b1dRz3wNQANu+wsdp14yEr4jkDI8n2GU aLaUO6bFCEpspaELxVWqtkM3mSG8UtG1sTwdXehBEG37c1AzcT2YuEPVsz+NfGFbNwF3 Hk8e/MeLogu5LtrXI/0SpK1fSdbTflsiaFj0Cr3CSW01Y2qcdyojKULjtLuJiz4xYwAv 4n5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=L6W6b2WwJjJRa5I/RuOzEdaIPUukeUfVHD6x02JRqtI=; b=c1LhqsK3rmcc5a//uMphmvHKaXYoELTHxNz80NKd1nc5gWedMwx34zc57xfRazBe4M 15AooUOGG7l8D+I/1h8TVe4EB3pdL4DSkpVjCVpYYuzSKd+Atv/lzxWyzCNE24JMGO/r oVpGrvc7HuhRMsKboKSgT5BlP/sulLx06N8wDywiqX2qNOonv5utQOByi4eg56PWqcZv n1us4ZkhLvNaxpNAhBTrcMst1SBF9vzZ5QTDntgydu6Xr7ex8r/FoV3d/SRM91e93B1E vxxOrSDM+NsAsS/6etSn6rU0YrhOJk+apwtOxMB8BTukWNHHqiN46PyI8VnkN6kGjUgG 2yfw== X-Gm-Message-State: APjAAAW/S5nZ6iHiKvWYVTEdDkF8t1zSwOxpI+Z6C9PdYDAbU4znu3bl 8owF63D4A1rrhshCn8zON1ggAKWt X-Google-Smtp-Source: APXvYqyJ9AOHWMuRmJFSbp7mYWS0V3fAKol07Zx5mJc2xDt0w5H9SdvPnnQytPADWDqoT4KSzbfcOQ== X-Received: by 2002:adf:8541:: with SMTP id 59mr47813873wrh.298.1566490944415; Thu, 22 Aug 2019 09:22:24 -0700 (PDT) Received: from desktop.lan (ip-86-49-35-8.net.upcbroadband.cz. [86.49.35.8]) by smtp.gmail.com with ESMTPSA id c8sm59918wrn.50.2019.08.22.09.22.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Aug 2019 09:22:22 -0700 (PDT) From: Marek Vasut X-Google-Original-From: Marek Vasut To: u-boot@lists.denx.de Date: Thu, 22 Aug 2019 18:22:06 +0200 Message-Id: <20190822162214.19011-2-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.23.0.rc1 In-Reply-To: <20190822162214.19011-1-marek.vasut+renesas@gmail.com> References: <20190822162214.19011-1-marek.vasut+renesas@gmail.com> MIME-Version: 1.0 Cc: Marek Vasut Subject: [U-Boot] [PATCH V2 02/10] usb: r8a66597: Make CONFIG_RZA_USB default X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" No other platforms use this r8a66597 controller but RZ/A1, make RZ/A1 support the default and drop all the other SoC support to remove ifdeffery. Signed-off-by: Marek Vasut Cc: Chris Brandt --- V2: No change --- drivers/usb/host/r8a66597-hcd.c | 35 ----------------------------- drivers/usb/host/r8a66597.h | 39 --------------------------------- 2 files changed, 74 deletions(-) diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c index 8cca09f6d8..d144b57a61 100644 --- a/drivers/usb/host/r8a66597-hcd.c +++ b/drivers/usb/host/r8a66597-hcd.c @@ -70,20 +70,6 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597) } } while ((tmp & USBE) != USBE); r8a66597_bclr(r8a66597, USBE, SYSCFG0); -#if !defined(CONFIG_RZA_USB) - r8a66597_mdfy(r8a66597, CONFIG_R8A66597_XTAL, XTAL, SYSCFG0); - - i = 0; - r8a66597_bset(r8a66597, XCKE, SYSCFG0); - do { - udelay(1000); - tmp = r8a66597_read(r8a66597, SYSCFG0); - if (i++ > 500) { - printf("register access fail.\n"); - return -1; - } - } while ((tmp & SCKE) != SCKE); -#else /* * RZ/A Only: * Bits XTAL(UCKSEL) and UPLLE in SYSCFG0 for USB0 controls both USB0 @@ -96,28 +82,18 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597) setbits(le16, R8A66597_BASE0, UPLLE); mdelay(1); r8a66597_bset(r8a66597, SUSPM, SUSPMODE0); -#endif /* CONFIG_RZA_USB */ return 0; } static void r8a66597_clock_disable(struct r8a66597 *r8a66597) { -#if !defined(CONFIG_RZA_USB) - r8a66597_bclr(r8a66597, SCKE, SYSCFG0); - udelay(1); - r8a66597_bclr(r8a66597, PLLC, SYSCFG0); - r8a66597_bclr(r8a66597, XCKE, SYSCFG0); - r8a66597_bclr(r8a66597, USBE, SYSCFG0); -#else r8a66597_bclr(r8a66597, SUSPM, SUSPMODE0); clrbits(le16, R8A66597_BASE0, UPLLE); mdelay(1); r8a66597_bclr(r8a66597, USBE, SYSCFG0); mdelay(1); - -#endif } static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port) @@ -127,10 +103,6 @@ static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port) val = port ? DRPD : DCFM | DRPD; r8a66597_bset(r8a66597, val, get_syscfg_reg(port)); r8a66597_bset(r8a66597, HSE, get_syscfg_reg(port)); - -#if !defined(CONFIG_RZA_USB) - r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, get_dmacfg_reg(port)); -#endif } static void r8a66597_disable_port(struct r8a66597 *r8a66597, int port) @@ -160,9 +132,6 @@ static int enable_controller(struct r8a66597 *r8a66597) if (ret < 0) return ret; -#if !defined(CONFIG_RZA_USB) - r8a66597_bset(r8a66597, CONFIG_R8A66597_LDRV & LDRV, PINCFG); -#endif r8a66597_bset(r8a66597, USBE, SYSCFG0); r8a66597_bset(r8a66597, INTL, SOFCFG); @@ -280,16 +249,13 @@ static int send_setup_packet(struct r8a66597 *r8a66597, struct usb_device *dev, unsigned long setup_addr = USBREQ; u16 intsts1; int timeout = 3000; -#if defined(CONFIG_RZA_USB) u16 dcpctr; -#endif u16 devsel = setup->request == USB_REQ_SET_ADDRESS ? 0 : dev->devnum; r8a66597_write(r8a66597, make_devsel(devsel) | (8 << dev->maxpacketsize), DCPMAXP); r8a66597_write(r8a66597, ~(SIGN | SACK), INTSTS1); -#if defined(CONFIG_RZA_USB) dcpctr = r8a66597_read(r8a66597, DCPCTR); if ((dcpctr & PID) == PID_BUF) { if (readw_poll_timeout(r8a66597->reg + DCPCTR, dcpctr, @@ -298,7 +264,6 @@ static int send_setup_packet(struct r8a66597 *r8a66597, struct usb_device *dev, return -ETIMEDOUT; } } -#endif for (i = 0; i < 4; i++) { r8a66597_write(r8a66597, le16_to_cpu(p[i]), setup_addr); diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h index 4859e26355..1e370cdd6c 100644 --- a/drivers/usb/host/r8a66597.h +++ b/drivers/usb/host/r8a66597.h @@ -89,27 +89,14 @@ #define SUSPMODE0 0x102 /* RZ/A only */ /* System Configuration Control Register */ -#if !defined(CONFIG_RZA_USB) -#define XTAL 0xC000 /* b15-14: Crystal selection */ -#define XTAL48 0x8000 /* 48MHz */ -#define XTAL24 0x4000 /* 24MHz */ -#define XTAL12 0x0000 /* 12MHz */ -#define XCKE 0x2000 /* b13: External clock enable */ -#define PLLC 0x0800 /* b11: PLL control */ -#define SCKE 0x0400 /* b10: USB clock enable */ -#define PCSDIS 0x0200 /* b9: not CS wakeup */ -#define LPSME 0x0100 /* b8: Low power sleep mode */ -#endif #define HSE 0x0080 /* b7: Hi-speed enable */ #define DCFM 0x0040 /* b6: Controller function select */ #define DRPD 0x0020 /* b5: D+/- pull down control */ #define DPRPU 0x0010 /* b4: D+ pull up control */ -#if defined(CONFIG_RZA_USB) #define XTAL 0x0004 /* b2: Crystal selection */ #define XTAL12 0x0004 /* 12MHz */ #define XTAL48 0x0000 /* 48MHz */ #define UPLLE 0x0002 /* b1: internal PLL control */ -#endif #define USBE 0x0001 /* b0: USB module operation enable */ /* System Configuration Status Register */ @@ -178,11 +165,7 @@ #define REW 0x4000 /* b14: Buffer rewind */ #define DCLRM 0x2000 /* b13: DMA buffer clear mode */ #define DREQE 0x1000 /* b12: DREQ output enable */ -#if !defined(CONFIG_RZA_USB) -#define MBW 0x0400 /* b10: Maximum bit width for FIFO access */ -#else #define MBW 0x0800 /* b10: Maximum bit width for FIFO access */ -#endif #define MBW_8 0x0000 /* 8bit */ #define MBW_16 0x0400 /* 16bit */ #define MBW_32 0x0800 /* 32bit */ @@ -427,7 +410,6 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597, int len) { int i; -#if defined(CONFIG_RZA_USB) unsigned long fifoaddr = r8a66597->reg + offset; unsigned long count; unsigned long *p = buf; @@ -440,13 +422,6 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597, unsigned long tmp = inl(fifoaddr); memcpy((unsigned char *)buf + count * 4, &tmp, len & 0x03); } -#else - unsigned short *p = buf; - - len = (len + 1) / 2; - for (i = 0; i < len; i++) - p[i] = inw(r8a66597->reg + offset); -#endif } static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val, @@ -461,7 +436,6 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597, { int i; unsigned long fifoaddr = r8a66597->reg + offset; -#if defined(CONFIG_RZA_USB) unsigned long count; unsigned char *pb; unsigned long *p = buf; @@ -479,19 +453,6 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597, outb(pb[i], fifoaddr + 3 - i); } } -#else - int odd = len & 0x0001; - unsigned short *p = buf; - - len = len / 2; - for (i = 0; i < len; i++) - outw(p[i], fifoaddr); - - if (odd) { - unsigned char *pb = (unsigned char *)(buf + len); - outb(*pb, fifoaddr); - } -#endif } static inline void r8a66597_mdfy(struct r8a66597 *r8a66597,