Message ID | 20190729091819.9455-1-matwey.kornilov@gmail.com |
---|---|
State | Accepted |
Commit | a9775a82a52162b346ab3c851d91b3cd7e856518 |
Delegated to: | Kever Yang |
Headers | show |
Series | [U-Boot,1/2] rockchip: rk3328: set DDR as non-secure in SPL | expand |
On 2019/7/29 下午5:18, Matwey V. Kornilov wrote: > From: Kever Yang <kever.yang@rock-chips.com> > > Set DDR as non-secure so that MMC DMA can access. > > Signed-off-by: Kever Yang <kever.yang@rock-chips.com> > [cherry picked from https://github.com/rockchip-linux/u-boot/commit/bfe741ab9eb4f97371a4e6c24185419d57a3a75f and https://github.com/rockchip-linux/u-boot/commit/73d952acc8cc1ddad6652ba71895d9fe928c1e4b with minor modifications] > Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Thanks, - Kever > --- > arch/arm/mach-rockchip/rk3328/rk3328.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c > index 592f287613..c2448d7273 100644 > --- a/arch/arm/mach-rockchip/rk3328/rk3328.c > +++ b/arch/arm/mach-rockchip/rk3328/rk3328.c > @@ -16,6 +16,7 @@ DECLARE_GLOBAL_DATA_PTR; > #define CRU_BASE 0xFF440000 > #define GRF_BASE 0xFF100000 > #define UART2_BASE 0xFF130000 > +#define FW_DDR_CON_REG 0xFF7C0040 > > const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { > [BROM_BOOTSOURCE_EMMC] = "rksdmmc@ff520000", > @@ -46,8 +47,12 @@ struct mm_region *mem_map = rk3328_mem_map; > > int arch_cpu_init(void) > { > +#ifdef CONFIG_SPL_BUILD > /* We do some SoC one time setting here. */ > > + /* Disable the ddr secure region setting to make it non-secure */ > + rk_setreg(FW_DDR_CON_REG, 0x200); > +#endif > return 0; > } >
On Mon, Aug 5, 2019 at 8:54 PM Kever Yang <kever.yang@rock-chips.com> wrote: > > > On 2019/7/29 下午5:18, Matwey V. Kornilov wrote: > > From: Kever Yang <kever.yang@rock-chips.com> > > > > Set DDR as non-secure so that MMC DMA can access. > > > > Signed-off-by: Kever Yang <kever.yang@rock-chips.com> > > [cherry picked from https://github.com/rockchip-linux/u-boot/commit/bfe741ab9eb4f97371a4e6c24185419d57a3a75f and https://github.com/rockchip-linux/u-boot/commit/73d952acc8cc1ddad6652ba71895d9fe928c1e4b with minor modifications] > > Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com> > > Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Chen-Yu Tsai <wens@csie.org> on a Rock64.
diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c index 592f287613..c2448d7273 100644 --- a/arch/arm/mach-rockchip/rk3328/rk3328.c +++ b/arch/arm/mach-rockchip/rk3328/rk3328.c @@ -16,6 +16,7 @@ DECLARE_GLOBAL_DATA_PTR; #define CRU_BASE 0xFF440000 #define GRF_BASE 0xFF100000 #define UART2_BASE 0xFF130000 +#define FW_DDR_CON_REG 0xFF7C0040 const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { [BROM_BOOTSOURCE_EMMC] = "rksdmmc@ff520000", @@ -46,8 +47,12 @@ struct mm_region *mem_map = rk3328_mem_map; int arch_cpu_init(void) { +#ifdef CONFIG_SPL_BUILD /* We do some SoC one time setting here. */ + /* Disable the ddr secure region setting to make it non-secure */ + rk_setreg(FW_DDR_CON_REG, 0x200); +#endif return 0; }