From patchwork Mon Jul 22 11:59:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kever Yang X-Patchwork-Id: 1134868 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=rock-chips.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="GYX4Yk7M"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45shCd2whcz9sBF for ; Mon, 22 Jul 2019 22:45:16 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id A5AF3C220AF; Mon, 22 Jul 2019 12:45:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id C685CC21F02; Mon, 22 Jul 2019 12:04:12 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id B72C6C21F19; Mon, 22 Jul 2019 12:04:11 +0000 (UTC) Received: from mail-pg1-f194.google.com (mail-pg1-f194.google.com [209.85.215.194]) by lists.denx.de (Postfix) with ESMTPS id 6A504C21E50 for ; Mon, 22 Jul 2019 12:00:06 +0000 (UTC) Received: by mail-pg1-f194.google.com with SMTP id s1so11247070pgr.2 for ; Mon, 22 Jul 2019 05:00:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=iOLW7wxpuECmfsAdS0To90Cs3CCO/XzHEtEih/fSWvA=; b=GYX4Yk7Mj588BQYZ+kOd3JhizDMJMVfneyHTBGaBWIRYT+8ctFEzQhDynDMkhZw4Bs 1PhZW7MwZJkdhca8oVDJojnabPHZpnK2Kb/VbtuConfQs5lPyaFLsrEWjibKIl64MLYI YciiA4kB4eAceoZKW4igZpm1or1dlQBeDnwpHzBqq6VxHQ9O/NdUHtPqrpxZs2CgXZqs OKUd44R44i/JfbJWOXOPWK3x+UWRz0S6nY3672rGx5xI95BODbfQb9Q5zZB7p3Q95+/o 5oUJ2XMPbxX/7s6Sc/3RFQ/xqJAj14aNolNWVaL3uhOA6eca/jUcGFIXSltJnrP7TcRv a0eA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=iOLW7wxpuECmfsAdS0To90Cs3CCO/XzHEtEih/fSWvA=; b=bRUmVGqv/Q/qollE44w5HDuHg+7d1tfDZnWue8b56bfb1jIabhf7OHP6FWGvObR64h XxF82vxYST4e/LhdWlDCfu0D2tKAia55c5GiTJyYcEIVmL4r2OFU9JdsjyqoGo0LTwDE sZ6rdMLgmFH+JsZfrIRY3e1pXl5Sy3CtgVa0h9JZOEjG2otUmGK2nTob0FcU7zVc5YwR GV8InmIUT04P4OFY2uski71d+vCefZQS11vsKvR1reQEtZYUr172AGDT5OFPYidzRH/V V6IL2V1qEifjfsmi/MGVSCOzewqn843zBCoYpP2iaZM5JYw1NIimwM5F989M5orp8K5L iWGA== X-Gm-Message-State: APjAAAXwqdriW6D39owjZJuD+r+qVI09dOCGxq7qisxlH+KoRRsIPDzJ CtWh1feF72GZB9pauT7kgHyrBaSX X-Google-Smtp-Source: APXvYqz44LMa1+IoMx4xX4Y++CrMZ0RxUXfEFd6kJsiZKKR0btPc5hk6TzfqdxW4SIPNUPjFC/uNQg== X-Received: by 2002:a63:714a:: with SMTP id b10mr37653967pgn.25.1563796804853; Mon, 22 Jul 2019 05:00:04 -0700 (PDT) Received: from localhost.localdomain ([103.29.142.67]) by smtp.gmail.com with ESMTPSA id u134sm37621218pfc.19.2019.07.22.05.00.02 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 22 Jul 2019 05:00:04 -0700 (PDT) From: Kever Yang To: u-boot@lists.denx.de Date: Mon, 22 Jul 2019 19:59:12 +0800 Message-Id: <20190722115942.24962-6-kever.yang@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190722115942.24962-1-kever.yang@rock-chips.com> References: <20190722115942.24962-1-kever.yang@rock-chips.com> Subject: [U-Boot] [PATCH 05/35] rockchip: add common spl board file X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The common spl board file handles board_init_f() in SPL, and with board_early_init_f() and arch_cpu_init() callback, other operateion after board_init_f() should go to board specific spl_board_init(). Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/Kconfig | 8 ++ arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/spl.c | 154 ++++++++++++++++++++++++++++++++ 3 files changed, 163 insertions(+) create mode 100644 arch/arm/mach-rockchip/spl.c diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 17f31e89f3..ac86532c88 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -227,6 +227,14 @@ config TPL_ROCKCHIP_BACK_TO_BROM SPL will return to the boot rom, which will then load the U-Boot binary to keep going on. +config SPL_ROCKCHIP_COMMON_BOARD + bool "Rockchip SPL common board file" + depends on SPL + help + Rockchip SoCs have similar boot process, SPL is mainly in charge of + load and boot Trust ATF/U-Boot firmware, and DRAM init if there is + no TPL for the board. + config TPL_ROCKCHIP_COMMON_BOARD bool "" depends on TPL diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index a12b8d4434..b831ec6f2b 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -7,6 +7,7 @@ # inaccessible/protected memory (and the bootrom-helper assumes that # the stack-pointer is valid before switching to the U-Boot stack). obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o +obj-spl-$(CONFIG_SPL_ROCKCHIP_COMMON_BOARD) += spl.o spl-boot-order.o obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o obj-tpl-$(CONFIG_TPL_ROCKCHIP_COMMON_BOARD) += tpl.o diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c new file mode 100644 index 0000000000..e00b2f11dc --- /dev/null +++ b/arch/arm/mach-rockchip/spl.c @@ -0,0 +1,154 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2019 Rockchip Electronics Co., Ltd + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +void board_return_to_bootrom(void) +{ + back_to_bootrom(BROM_BOOT_NEXTSTAGE); +} + +__weak const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { +}; + +const char *board_spl_was_booted_from(void) +{ + u32 bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR); + const char *bootdevice_ofpath = NULL; + + if (bootdevice_brom_id < ARRAY_SIZE(boot_devices)) + bootdevice_ofpath = boot_devices[bootdevice_brom_id]; + + if (bootdevice_ofpath) + debug("%s: brom_bootdevice_id %x maps to '%s'\n", + __func__, bootdevice_brom_id, bootdevice_ofpath); + else + debug("%s: failed to resolve brom_bootdevice_id %x\n", + __func__, bootdevice_brom_id); + + return bootdevice_ofpath; +} + +u32 spl_boot_device(void) +{ + u32 boot_device = BOOT_DEVICE_MMC1; + +#if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \ + defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \ + defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) + return BOOT_DEVICE_SPI; +#endif + if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)) + return BOOT_DEVICE_BOOTROM; + + return boot_device; +} + +u32 spl_boot_mode(const u32 boot_device) +{ + return MMCSD_MODE_RAW; +} + +#if !defined(CONFIG_SUPPORT_TPL) && !defined(CONFIG_ROCKCHIP_RK3188) +#define TIMER_LOAD_COUNT_L 0x00 +#define TIMER_LOAD_COUNT_H 0x04 +#define TIMER_CONTROL_REG 0x10 +#define TIMER_EN 0x1 +#define TIMER_FMODE BIT(0) +#define TIMER_RMODE BIT(1) + +__weak void rockchip_stimer_init(void) +{ + /* If Timer already enabled, don't re-init it */ + u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); + + if (reg & TIMER_EN) + return; +#ifndef CONFIG_ARM64 + asm volatile("mcr p15, 0, %0, c14, c0, 0" + : : "r"(COUNTER_FREQUENCY)); +#endif + writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); + writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE); + writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4); + writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE + + TIMER_CONTROL_REG); +} +#endif + +__weak int board_early_init_f(void) +{ + return 0; +} + +__weak int arch_cpu_init(void) +{ + return 0; +} + +void board_init_f(ulong dummy) +{ + int ret; +#if !defined(CONFIG_SUPPORT_TPL) + struct udevice *dev; +#endif + +#ifdef CONFIG_DEBUG_UART + /* + * Debug UART can be used from here if required: + * + * debug_uart_init(); + * printch('a'); + * printhex8(0x1234); + * printascii("string"); + */ + debug_uart_init(); + debug("\nspl:debug uart enabled in %s\n", __func__); +#endif + + board_early_init_f(); + + ret = spl_early_init(); + if (ret) { + printf("spl_early_init() failed: %d\n", ret); + hang(); + } + arch_cpu_init(); +#if !defined(CONFIG_SUPPORT_TPL) + debug("\nspl:init dram\n"); + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { + printf("DRAM init failed: %d\n", ret); + return; + } +#ifndef CONFIG_ROCKCHIP_RK3188 + rockchip_stimer_init(); +#endif +#endif +#ifdef CONFIG_SYS_ARCH_TIMER + /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */ + timer_init(); +#endif + preloader_console_init(); +} + +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + /* Just empty function now - can't decide what to choose */ + debug("%s: %s\n", __func__, name); + + return 0; +} +#endif