From patchwork Tue Jun 11 14:50:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1114042 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="dpJlCAF4"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45NZ9g3r4Dz9sNR for ; Wed, 12 Jun 2019 01:46:31 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id D0EDFC22250; Tue, 11 Jun 2019 15:14:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 0682EC21CB6; Tue, 11 Jun 2019 15:14:54 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 6ED70C220BA; Tue, 11 Jun 2019 14:55:35 +0000 (UTC) Received: from mail-pl1-f193.google.com (mail-pl1-f193.google.com [209.85.214.193]) by lists.denx.de (Postfix) with ESMTPS id 821DDC21E57 for ; Tue, 11 Jun 2019 14:55:31 +0000 (UTC) Received: by mail-pl1-f193.google.com with SMTP id a93so5233819pla.7 for ; Tue, 11 Jun 2019 07:55:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=VZZq8s/MFgMQ4+KCax6f04xB7tKYUG01ZRKiMSlIBrI=; b=dpJlCAF4nB2sXe4pTDshY+JDucM4o9pomeDL15230IOt3GubJrLMCejywi54/M/XEH gA151hEH6+rYqxLOETqAr6yLvSojZ/YoGE7HJMyFrIirEMuKntCUsjDdjAH6ay2ejtHi ciU/hM9xDpDmXHDW3HxaGokR/Tk7y4vO7WAls= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=VZZq8s/MFgMQ4+KCax6f04xB7tKYUG01ZRKiMSlIBrI=; b=g+iWjVfTfiXTOgZzLCZ9eyZfDTNBzfUy0O4uWpboqUPkDRIzB5TQv6M7QcF1Ks3I6F DKhubBe8yVM2BMT301U7sAlBHneccn4y5UG94qjcFD0aMUEURTUaZXNNZjTN7au5kNtI usoECdutnYVqxpgYgJbeHJuc6kPJTq9Y1ceGtX8MD9aSMzdNsG4IfLMlmFTUgvxQWWxZ 4qk7BdDZtysbF7QM57gBU2+RbAxQYEKGO0R4mB/dO1IgRueK+iG7RzqqaxNKnhgEuQsm HdD5y+wVWjG3Kps4SNZhlEQfDsR1ExYD4KMvrgfnBX/L7djigDhKQasPLTFHINIgP3Nu Yaig== X-Gm-Message-State: APjAAAXnjTGtrqYH5gZl1N/4OdYRlEZMSpbFSc8nHao9Z2sFdwTu1yCE 5GGa1T6U/pH2AXAPP3pHHpoFVQ== X-Google-Smtp-Source: APXvYqyIjvefk9GGkYKTTYabb8QFKZxVBZRVhkf0CvA94l+SSIVdS5rveYbcIDGogcfct/0RhuPeoQ== X-Received: by 2002:a17:902:988a:: with SMTP id s10mr76935799plp.304.1560264930144; Tue, 11 Jun 2019 07:55:30 -0700 (PDT) Received: from localhost.localdomain ([115.97.180.18]) by smtp.gmail.com with ESMTPSA id e9sm16206208pfn.154.2019.06.11.07.55.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 11 Jun 2019 07:55:29 -0700 (PDT) From: Jagan Teki To: Simon Glass , Philipp Tomsich , Kever Yang , YouMin Chen , u-boot@lists.denx.de Date: Tue, 11 Jun 2019 20:20:58 +0530 Message-Id: <20190611145135.21399-56-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190611145135.21399-1-jagan@amarulasolutions.com> References: <20190611145135.21399-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, gajjar04akash@gmail.com Subject: [U-Boot] [PATCH 55/92] clk: rockchip: rk3399: Set 400MHz ddr clock X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add support for setting 400MHz ddr clock. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/clk/rockchip/clk_rk3399.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 1de21c9f3e..79007b8682 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -839,6 +839,10 @@ static ulong rk3399_ddr_set_clk(struct rk3399_cru *cru, dpll_cfg = (struct pll_div) {.refdiv = 2, .fbdiv = 100, .postdiv1 = 4, .postdiv2 = 1}; break; + case 400 * MHz: + dpll_cfg = (struct pll_div) + {.refdiv = 1, .fbdiv = 50, .postdiv1 = 3, .postdiv2 = 1}; + break; case 666 * MHz: dpll_cfg = (struct pll_div) {.refdiv = 2, .fbdiv = 111, .postdiv1 = 2, .postdiv2 = 1};