diff mbox series

[U-Boot,41/92] arm: include: rockchip: Add DDR4 enum

Message ID	20190611145135.21399-42-jagan@amarulasolutions.com
State	Changes Requested
Delegated to:	Jagannadha Sutradharudu Teki
Headers	show Return-Path: <u-boot-bounces@lists.denx.de> From: Jagan Teki <jagan@amarulasolutions.com> To: Simon Glass <sjg@chromium.org>, Philipp Tomsich <philipp.tomsich@theobroma-systems.com>, Kever Yang <kever.yang@rock-chips.com>, YouMin Chen <cym@rock-chips.com>, u-boot@lists.denx.de Date: Tue, 11 Jun 2019 20:20:44 +0530 Message-Id: <20190611145135.21399-42-jagan@amarulasolutions.com> In-Reply-To: <20190611145135.21399-1-jagan@amarulasolutions.com> References: <20190611145135.21399-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, gajjar04akash@gmail.com Subject: [U-Boot] [PATCH 41/92] arm: include: rockchip: Add DDR4 enum Precedence: list Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" <u-boot-bounces@lists.denx.de>
Series	ram: rk3399: Add LPDDR4 support \| expand [U-Boot,00/92] ram: rk3399: Add LPDDR4 support [U-Boot,01/92] ram: rk3399: Fix code warnings [U-Boot,02/92] ram: rk3399: Add space between string with format specifier [U-Boot,03/92] ram: rk3399: Add proper spaces in data training [U-Boot,04/92] ram: rk3399: Handle data training return types [U-Boot,05/92] ram: rk3399: Order include files [U-Boot,06/92] ram: rk3399: Move macro after include files [U-Boot,07/92] ram: rk3399: Clear PI_175 interrupts in data training [U-Boot,08/92] ram: rk3399: Use rank mask in ca data training [U-Boot,09/92] ram: rk3399: Use rank mask in wdql data training [U-Boot,10/92] ram: rk3399: Add ddrtype enc macro [U-Boot,11/92] ram: rk3399: Add channel number encoder macro [U-Boot,12/92] ram: rk3399: Add row_3_4 enc macro [U-Boot,13/92] ram: rk3399: Add chipinfo macro [U-Boot,14/92] ram: rk3399: Add rank enc macro [U-Boot,15/92] ram: rk3399: Add column enc macro [U-Boot,16/92] ram: rk3399: Add bk enc macro [U-Boot,17/92] ram: rk3399: Add dbw enc macro [U-Boot,18/92] ram: rk3399: Add cs0_rw macro [U-Boot,19/92] ram: rk3399: Add cs1_rw macro [U-Boot,20/92] ram: rk3399: Add bw enc macro [U-Boot,21/92] ram: rk3399: Rename sys_reg with sys_reg2 [U-Boot,22/92] ram: rk3399: Update cs0_row to use sys_reg3 [U-Boot,23/92] ram: rk3399: Update cs1_row to use sys_reg3 [U-Boot,24/92] ram: rk3399: Add cs1_col enc macro [U-Boot,25/92] ram: rk3399: Add ddr version enc macro [U-Boot,26/92] ram: rk3399: Add ddrtimingC0 [U-Boot,27/92] ram: rk3399: Add DdrMode [U-Boot,28/92] ram: rk3399: Handle pctl_cfg return type [U-Boot,29/92] ram: rk3399: s/tsel_wr_select_n/tsel_wr_select_dq_n [U-Boot,30/92] ram: rk3399: s/tsel_wr_select_p/tsel_wr_select_dq_p [U-Boot,31/92] ram: rk3399: s/ca_tsel_wr_select_n/tsel_wr_select_ca_n [U-Boot,32/92] ram: rk3399: s/ca_tsel_wr_select_p/tsel_wr_select_ca_p [U-Boot,33/92] ram: rk3399: Order tsel variables [U-Boot,34/92] ram: rk3399: Add phy pctrl reset support [U-Boot,35/92] ram: rk3399: Move pwrup_srefresh_exit to dram_info [U-Boot,36/92] ram: rk3399: Add pctl start support [U-Boot,37/92] ram: rockchip: rk3399: Add cap_info structure [U-Boot,38/92] ram: rk3399: s/rk3399_base_params/sdram_base_params [U-Boot,39/92] ram: rk3399: Move common sdram structures in common header [U-Boot,40/92] arm: include: rockchip: Move dramtypes to common header [U-Boot,41/92] arm: include: rockchip: Add DDR4 enum [U-Boot,42/92] ram: rockchip: Add initial Kconfig [U-Boot,43/92] debug_uart: Add printdec [U-Boot,44/92] ram: rockchip: Add debug sdram driver [U-Boot,45/92] ram: rockchip: debug: Add sdram_print_ddr_info [U-Boot,46/92] ram: rockchip: debug: Get the cs capacity [U-Boot,47/92] ram: rk3399: debug: Add sdram_print_stride [U-Boot,48/92] ram: rk3399: Compute stride for 2 channels [U-Boot,49/92] ram: rk3399: Compute stride for 1 channel a [U-Boot,50/92] ram: rk3399: Add rank detection support [U-Boot,51/92] ram: rk3399: Enable sdram debug functions [U-Boot,52/92] rockchip: dts: rk3399: nanopi-neo4: Use DDR3-1866 dtsi [U-Boot,53/92] clk: rockchip: rk3399: Fix check patch warnings and checks [U-Boot,54/92] clk: rockchip: rk3399: Set 50MHz ddr clock [U-Boot,55/92] clk: rockchip: rk3399: Set 400MHz ddr clock [U-Boot,56/92] ram: rk3399: Add spaces in pctl_cfg [U-Boot,57/92] ram: rk3399: Configure phy IO in ds odt [U-Boot,58/92] ram: rk3399: Add lpddr4 rank mask for cs training [U-Boot,59/92] ram: rk3399: Add lpddr4 rank mask for wdql training [U-Boot,60/92] ram: rk3399: Move mode_sel assignment [U-Boot,61/92] ram: rk3399: Don't wait for PLL lock in lpddr4 [U-Boot,62/92] ram: rk3399: Avoid two channel ZQ Cal Start at the same time [U-Boot,63/92] ram: rk3399: Configure PHY_898, PHY_919 for lpddr4 [U-Boot,64/92] ram: rk3399: Configure BOOSTP_EN, BOOSTN_EN for lpddr4 [U-Boot,65/92] ram: rk3399: Configure SLEWP_EN, SLEWN_EN for lpddr4 [U-Boot,66/92] ram: rk3399: Configure PHY RX_CM_INPUT for lpddr4 [U-Boot,67/92] ram: rk3399: Map chipselect for lpddr4 [U-Boot,68/92] ram: rk3399: Configure tsel write ca for lpddr4 [U-Boot,69/92] ram: rk3399: Don't disable dfi dram clk for lpddr4, rank 1 [U-Boot,70/92] ram: rk3399: Add IO settings [U-Boot,71/92] ram: sdram: Configure lpddr4 tsel rd, wr based on IO settings [U-Boot,72/92] ram: rk3399: Add tsel control clock drive [U-Boot,73/92] ram: rk3399: Configure soc odt support [U-Boot,74/92] ram: rk3399: Get lpddr4 tsel_rd_en from io settings [U-Boot,75/92] ram: rk3399: Update lpddr4 vref based on io settings [U-Boot,76/92] ram: rk3399: Update lpddr4 mode_sel based on io settings [U-Boot,77/92] ram: rk3399: Update lpddr4 vref_mode_ac [U-Boot,78/92] ram: rk3399: Add LPPDR4 mr detection [U-Boot,79/92] arm: include: rockchip: Add rk3399 pmu file [U-Boot,80/92] rockchip: rk3399: syscon: Add pmu support [U-Boot,81/92] rockchip: dts: rk3399: Add u-boot, dm-pre-reloc for pmu [U-Boot,82/92] ram: rk3399: Add LPPDDR4-400 timings inc [U-Boot,83/92] ram: rk3399: Add LPPDDR4-800 timings inc [U-Boot,84/92] ram: rk3399: Add lpddr4 set rate support [U-Boot,85/92] ram: rk3399: Set lpddr4 dq odt [U-Boot,86/92] ram: rk3399: Set lpddr4 ca odt [U-Boot,87/92] ram: rk3399: Set lpddr4 MR3 [U-Boot,88/92] ram: rk3399: Set lpddr4 MR12 [U-Boot,89/92] ram: rk3399: Set lpddr4 MR14 [U-Boot,90/92] rockchip: dts: rk3399: Add LPDDR4-100 timings [U-Boot,91/92] rockchip: dts: rk3399: rockpro64: Use LPDDR4-100 dtsi [U-Boot,92/92] rockchip: dts: rk3399: rock-pi-4: Use LPDDR4-100 dtsi

Commit Message

Jagan Teki June 11, 2019, 2:50 p.m. UTC

Add DDR4 enum number in common header.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
---
 arch/arm/include/asm/arch-rockchip/sdram_common.h | 1 +
 1 file changed, 1 insertion(+)

diff mbox series

Patch

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index e0a94f81a4..d723e6dacc 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -7,6 +7,7 @@ 
 #define _ASM_ARCH_SDRAM_COMMON_H
 
 enum {
+	DDR4 = 0,
 	DDR3 = 0x3,
 	LPDDR2 = 0x5,
 	LPDDR3 = 0x6,