@@ -57,6 +57,7 @@
#define SYS_REG_BW_MASK 3
#define SYS_REG_DBW_SHIFT(ch) ((ch) * 16)
#define SYS_REG_DBW_MASK 3
+#define SYS_REG_ENC_DBW(n, ch) ((2 >> (n)) << SYS_REG_DBW_SHIFT(ch))
/* Get sdram size decode from reg */
size_t rockchip_sdram_size(phys_addr_t reg);
@@ -1031,7 +1031,7 @@ static void dram_all_config(struct dram_info *dram,
sys_reg |= (info->cs1_row - 13) <<
SYS_REG_CS1_ROW_SHIFT(channel);
sys_reg |= (2 >> info->bw) << SYS_REG_BW_SHIFT(channel);
- sys_reg |= (2 >> info->dbw) << SYS_REG_DBW_SHIFT(channel);
+ sys_reg |= SYS_REG_ENC_DBW(info->dbw, channel);
ddr_msch_regs = dram->chan[channel].msch;
noc_timing = &sdram_params->ch[channel].noc_timings;