@@ -20,7 +20,7 @@
k3_pds: power-controller {
compatible = "ti,sci-pm-domain";
- #power-domain-cells = <1>;
+ #power-domain-cells = <2>;
};
k3_clks: clocks {
@@ -8,6 +8,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/soc/ti,sci_pm_domain.h>
/ {
model = "Texas Instruments K3 AM654 SoC";
@@ -32,7 +32,7 @@
reg = <0x0 0x4FA0000 0x0 0x1000>,
<0x0 0x4FB0000 0x0 0x400>;
clocks = <&k3_clks 48 1>;
- power-domains = <&k3_pds 48>;
+ power-domains = <&k3_pds 48 TI_SCI_PD_SHARED>;
max-frequency = <25000000>;
ti,otap-del-sel = <0x2>;
ti,trm-icp = <0x8>;
@@ -11,8 +11,8 @@
<0x0 0x02988000 0x0 0x2000>;
reg-names = "ss", "ctl", "phy";
clocks = <&k3_clks 20 0>;
- power-domains = <&k3_pds 20>,
- <&k3_pds 244>;
+ power-domains = <&k3_pds 20 TI_SCI_PD_SHARED>,
+ <&k3_pds 244 TI_SCI_PD_SHARED>;
assigned-clocks = <&k3_clks 20 1>;
assigned-clock-rates = <DDR_PLL_FREQUENCY>;
u-boot,dm-spl;
@@ -32,8 +32,8 @@
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x0 0x00a90000 0x0 0x10>;
- power-domains = <&k3_pds 61>,
- <&k3_pds 202>;
+ power-domains = <&k3_pds 61 TI_SCI_PD_SHARED>,
+ <&k3_pds 202 TI_SCI_PD_SHARED>;
resets = <&k3_reset 202 0>;
assigned-clocks = <&k3_clks 202 0>;
assigned-clock-rates = <800000000>;
@@ -112,6 +112,10 @@
status = "okay";
};
+&main_uart0 {
+ power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
+};
+
&wkup_pmx0 {
u-boot,dm-spl;
wkup_uart0_pins_default: wkup_uart0_pins_default {
Update the power-domain-cells to 2 and add the permissions to each node. Mark all the nodes accessed by r5 as shared in r5 dts. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> --- arch/arm/dts/k3-am65-wakeup.dtsi | 2 +- arch/arm/dts/k3-am65.dtsi | 1 + arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 2 +- arch/arm/dts/k3-am654-ddr.dtsi | 4 ++-- arch/arm/dts/k3-am654-r5-base-board.dts | 8 ++++++-- 5 files changed, 11 insertions(+), 6 deletions(-)