| Message ID | 20190513190908.14890-1-simon.k.r.goldschmidt@gmail.com |
|---|---|
| State | Accepted, archived |
| Delegated to: | Marek Vasut |
| Headers | show |
| Series | [U-Boot,1/2] arm: socfpga: remove re-added ad-hoc reset code | expand |
Unfortunately, there's 2/2 (which removes this unused function from s10, too) missing here since patman won't let me send the mail due to "Ang" (from Ang, Chee Hong <chee.hong.ang@intel.com>) not being a well-formed email address... I'll work on that and re-send... Regards, Simon Am 13.05.2019 um 21:09 schrieb Simon Goldschmidt: > commit c5de2b7eae68 ("arm: socfpga: implement proper peripheral reset") > has removed the call to 'reset_deassert_peripherals_handoff()' from > socfpga gen5 SPL since the reset driver now handles resets. However, > commit c1d4b464c8b8 ("ARM: socfpga: Disable bridges in SPL unless booting from FPGA") > has re-added this ad-hoc reset code, so that all peripherals were now > again enabled instead of letting the drivers enable them by request. > > While at it, remove this function for gen5 as it should not be used. > > Fixes: commit c1d4b464c8b8 ("ARM: socfpga: Disable bridges in SPL unless booting from FPGA") > Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> > --- > > arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h | 1 - > arch/arm/mach-socfpga/reset_manager_gen5.c | 8 -------- > arch/arm/mach-socfpga/spl_gen5.c | 3 +-- > 3 files changed, 1 insertion(+), 11 deletions(-) > > diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h > index 5e490d182e..f4dcb14623 100644 > --- a/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h > +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h > @@ -8,7 +8,6 @@ > > #include <dt-bindings/reset/altr,rst-mgr.h> > > -void reset_deassert_peripherals_handoff(void); > void socfpga_bridges_set_handoff_regs(bool h2f, bool lwh2f, bool f2h); > void socfpga_bridges_reset(int enable); > > diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c b/arch/arm/mach-socfpga/reset_manager_gen5.c > index 89a384b59c..9a32f5abfe 100644 > --- a/arch/arm/mach-socfpga/reset_manager_gen5.c > +++ b/arch/arm/mach-socfpga/reset_manager_gen5.c > @@ -61,14 +61,6 @@ void socfpga_per_reset_all(void) > writel(0xffffffff, &reset_manager_base->per2_mod_reset); > } > > -/* > - * Release peripherals from reset based on handoff > - */ > -void reset_deassert_peripherals_handoff(void) > -{ > - writel(0, &reset_manager_base->per_mod_reset); > -} > - > #define L3REGS_REMAP_LWHPS2FPGA_MASK 0x10 > #define L3REGS_REMAP_HPS2FPGA_MASK 0x08 > #define L3REGS_REMAP_OCRAM_MASK 0x01 > diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c > index bd2a9fe5ae..1a60cdc897 100644 > --- a/arch/arm/mach-socfpga/spl_gen5.c > +++ b/arch/arm/mach-socfpga/spl_gen5.c > @@ -175,8 +175,7 @@ void board_init_f(ulong dummy) > sysmgr_pinmux_init(); > sysmgr_config_warmrstcfgio(0); > > - /* De-assert reset for peripherals and bridges based on handoff */ > - reset_deassert_peripherals_handoff(); > + /* Set bridges handoff value */ > socfpga_bridges_set_handoff_regs(true, true, true); > > debug("Unfreezing/Thaw all I/O banks\n"); >
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h index 5e490d182e..f4dcb14623 100644 --- a/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h @@ -8,7 +8,6 @@ #include <dt-bindings/reset/altr,rst-mgr.h> -void reset_deassert_peripherals_handoff(void); void socfpga_bridges_set_handoff_regs(bool h2f, bool lwh2f, bool f2h); void socfpga_bridges_reset(int enable); diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c b/arch/arm/mach-socfpga/reset_manager_gen5.c index 89a384b59c..9a32f5abfe 100644 --- a/arch/arm/mach-socfpga/reset_manager_gen5.c +++ b/arch/arm/mach-socfpga/reset_manager_gen5.c @@ -61,14 +61,6 @@ void socfpga_per_reset_all(void) writel(0xffffffff, &reset_manager_base->per2_mod_reset); } -/* - * Release peripherals from reset based on handoff - */ -void reset_deassert_peripherals_handoff(void) -{ - writel(0, &reset_manager_base->per_mod_reset); -} - #define L3REGS_REMAP_LWHPS2FPGA_MASK 0x10 #define L3REGS_REMAP_HPS2FPGA_MASK 0x08 #define L3REGS_REMAP_OCRAM_MASK 0x01 diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c index bd2a9fe5ae..1a60cdc897 100644 --- a/arch/arm/mach-socfpga/spl_gen5.c +++ b/arch/arm/mach-socfpga/spl_gen5.c @@ -175,8 +175,7 @@ void board_init_f(ulong dummy) sysmgr_pinmux_init(); sysmgr_config_warmrstcfgio(0); - /* De-assert reset for peripherals and bridges based on handoff */ - reset_deassert_peripherals_handoff(); + /* Set bridges handoff value */ socfpga_bridges_set_handoff_regs(true, true, true); debug("Unfreezing/Thaw all I/O banks\n");
commit c5de2b7eae68 ("arm: socfpga: implement proper peripheral reset") has removed the call to 'reset_deassert_peripherals_handoff()' from socfpga gen5 SPL since the reset driver now handles resets. However, commit c1d4b464c8b8 ("ARM: socfpga: Disable bridges in SPL unless booting from FPGA") has re-added this ad-hoc reset code, so that all peripherals were now again enabled instead of letting the drivers enable them by request. While at it, remove this function for gen5 as it should not be used. Fixes: commit c1d4b464c8b8 ("ARM: socfpga: Disable bridges in SPL unless booting from FPGA") Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> --- arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h | 1 - arch/arm/mach-socfpga/reset_manager_gen5.c | 8 -------- arch/arm/mach-socfpga/spl_gen5.c | 3 +-- 3 files changed, 1 insertion(+), 11 deletions(-)