From patchwork Wed Apr 3 12:21:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Urja Rannikko X-Patchwork-Id: 1075860 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="WI1K1DL0"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44Z4vf4FWmz9sSS for ; Wed, 3 Apr 2019 23:22:06 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id E3468C21EBE; Wed, 3 Apr 2019 12:22:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 60A0AC21E2C; Wed, 3 Apr 2019 12:22:00 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 0582AC21E2C; Wed, 3 Apr 2019 12:21:57 +0000 (UTC) Received: from mail-wm1-f65.google.com (mail-wm1-f65.google.com [209.85.128.65]) by lists.denx.de (Postfix) with ESMTPS id AC0CBC21E07 for ; Wed, 3 Apr 2019 12:21:57 +0000 (UTC) Received: by mail-wm1-f65.google.com with SMTP id v14so7942823wmf.2 for ; Wed, 03 Apr 2019 05:21:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=XgfzNc3UfhncXBqDetHC1wRqWiJlAlEpaBOVKOqt0yM=; b=WI1K1DL0fOfia5rnERgs7OURXjmjf1n95vG3h8cz+/WWE/M0zz4ROrhI7JqrKcQLvs M02jsBrP2sVPBQ42+70JkCnHubNZ6ITkcI6z9/H1lJhRe7huPu2X4GBBv+Zx6FCj0wMv B8OZecMGkSDyWtSOMMSJncOgY5N9mz8eVZudgGYLH9Z4RLvAMi4hhHRjvoSc5fbQtZ4H WYbOmORSue+QM145V7UDU35g5cFYZHJ38zeFc8xnIZTTn+NY/01hhe/mPy2WYXJeKfm+ 0oUQ3PHc/asFRY7gMRlE4/yVw7yMLrtUTeZPaF1vTa3L2cH5dZyXrw564r6aaJS3LO8R 7Fzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=XgfzNc3UfhncXBqDetHC1wRqWiJlAlEpaBOVKOqt0yM=; b=BCPF7QKyYsAye+YLGoG3e/Os6B7ySHViFaleed1ALmJV10NPEuWwT5cyXK5DPI2J3F a+St55DKMD5UtDnh43SJzeno7IHRuYsujXq4gYCJHW+Fvez1tpe8h8T2nXMwvetozXml c1WVNIAQoQ5Kr5Rx0wJw+P7/gfcrmSuzv5Z22VggyJnA7MYhQpOIYp2nQ/1JU3qV6lgh Kfb3NvSlIAu5rRsyxSXHERg1adJbEYfG3DemjRN4q2cw/98N6SAfx4n85xPs7G2ZiYao 2fVsTonSW9L67GL7HuU2CNlBzslwLuiG76CNg9XVwSmgve0cf6V7kvpU0JHCHsEGYLGx Jozw== X-Gm-Message-State: APjAAAW+OlxZfWisuC/HhiHm2bF6N7TuKry/HVgkuV0QsETJDt47r9Q8 9xj7ben8YGOk8nAGsNkAlnVyabNQaQ== X-Google-Smtp-Source: APXvYqwmCgKeGB3vwpDGD3A0KnrxYM+WjeKnU4c/OV5wDk9gzb+xxCLQnUL9MEFNZ7SqRl8K/TTKPA== X-Received: by 2002:a1c:3944:: with SMTP id g65mr23142wma.34.1554294117064; Wed, 03 Apr 2019 05:21:57 -0700 (PDT) Received: from localhost.localdomain (esm-84-240-79-214.netplaza.fi. [84.240.79.214]) by smtp.gmail.com with ESMTPSA id b204sm28829053wmh.29.2019.04.03.05.21.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 03 Apr 2019 05:21:56 -0700 (PDT) From: Urja Rannikko To: u-boot@lists.denx.de Date: Wed, 3 Apr 2019 12:21:50 +0000 Message-Id: <20190403122150.1231-1-urjaman@gmail.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Subject: [U-Boot] [PATCH] rk8xx: implement poweroff X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Based on snooping around the linux kernel rk8xx driver, and tested to work on the ASUS C201. Signed-off-by: Urja Rannikko --- This is really handy to be able to poweroff (without pressing power button for a long time) the C201 from u-boot, so i'm sending this as is. The thing that is bothering me is the pmic_get --- i checked that every rk8xx is named "pmic" in the device tree so it should work, but it just feels really weird that this seems to be the best way to access the driver... drivers/power/pmic/rk8xx.c | 34 ++++++++++++++++++++++++++++++++++ include/power/rk8xx_pmic.h | 4 ++++ 2 files changed, 38 insertions(+) diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c index 25c339ab12..c42e180e21 100644 --- a/drivers/power/pmic/rk8xx.c +++ b/drivers/power/pmic/rk8xx.c @@ -87,6 +87,40 @@ static int rk8xx_probe(struct udevice *dev) return 0; } +#if CONFIG_IS_ENABLED(CMD_POWEROFF) +/* NOTE: Should only enable this function if the rockchip,system-power-manager + * property is in the device tree node, but it is there in every board that has + * an rk8xx in u-boot currently, so this is left as an excercise for later. + */ + +int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + struct udevice *dev; + struct rk8xx_priv *priv; + u8 bits; + + /* "Hey, what would one name a pmic in the device tree..." */ + if (pmic_get("pmic", &dev) != 0) { + printf("pmic not found\n"); + return 1; + } + priv = dev_get_priv(dev); + + if (priv->variant == RK818_ID) + bits = DEV_OFF; + else + bits = DEV_OFF_RST; + + if (pmic_clrsetbits(dev, REG_DEVCTRL, 0, bits) != 0) { + printf("pmic_clrsetbits failed\n"); + return 1; + } + + printf("Poweroff apparently failed.\n"); + return 0; +} +#endif + static struct dm_pmic_ops rk8xx_ops = { .reg_count = rk8xx_reg_count, .read = rk8xx_read, diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h index c06248f751..565b35985e 100644 --- a/include/power/rk8xx_pmic.h +++ b/include/power/rk8xx_pmic.h @@ -177,6 +177,10 @@ enum { #define RK8XX_ID_MSK 0xfff0 +/* DEVCTRL bits for poweroff */ +#define DEV_OFF_RST BIT(3) +#define DEV_OFF BIT(0) + struct rk8xx_reg_table { char *name; u8 reg_ctl;