@@ -49,7 +49,6 @@ CONFIG_SYS_I2C_MXC_I2C4=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MISC=y
-CONFIG_MXC_OCOTP=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_SYS_I2C_EEPROM_BUS=2
@@ -36,7 +36,6 @@ CONFIG_SYS_I2C_MXC_I2C2=y
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_SYS_I2C_MXC_I2C4=y
CONFIG_MISC=y
-CONFIG_MXC_OCOTP=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_SYS_I2C_EEPROM_BUS=2
@@ -128,6 +128,8 @@ config JZ4780_EFUSE
config MXC_OCOTP
bool "Enable MXC OCOTP Driver"
+ depends on ARCH_IMX8M || ARCH_MX6 || ARCH_MX7 || ARCH_VF610
+ default y
help
If you say Y here, you will get support for the One Time
Programmable memory pages that are stored on the some
@@ -34,8 +34,6 @@
#define CONFIG_MXC_UART
-#define CONFIG_MXC_OCOTP
-
/* SATA Configs */
#define CONFIG_SYS_SATA_MAX_DEVICE 1
#define CONFIG_DWC_AHSATA_PORT_ID 0
@@ -41,11 +41,6 @@
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_MXC_I2C3_SPEED 400000
-/* OCOTP Configs */
-#ifdef CONFIG_CMD_FUSE
-#define CONFIG_MXC_OCOTP
-#endif
-
/* MMC Configs */
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
@@ -39,11 +39,6 @@
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_MXC_I2C3_SPEED 400000
-/* OCOTP Configs */
-#ifdef CONFIG_CMD_FUSE
-#define CONFIG_MXC_OCOTP
-#endif
-
/* MMC Configs */
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
@@ -17,10 +17,6 @@
#define CONFIG_SKIP_LOWLEVEL_INIT
-#ifdef CONFIG_CMD_FUSE
-#define CONFIG_MXC_OCOTP
-#endif
-
#ifdef CONFIG_VIDEO_FSL_DCU_FB
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_VIDEO_LOGO
@@ -48,11 +48,6 @@
#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_ARP_TIMEOUT 200UL
-/* Fuses */
-#ifdef CONFIG_CMD_FUSE
-#define CONFIG_MXC_OCOTP
-#endif
-
/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
@@ -35,8 +35,6 @@
#define CONFIG_MXC_UART
-#define CONFIG_MXC_OCOTP
-
/* SATA Configs */
#ifdef CONFIG_CMD_SATA
#define CONFIG_SYS_SATA_MAX_DEVICE 1
@@ -230,7 +230,6 @@
#define CONFIG_MXC_GPIO
-#define CONFIG_MXC_OCOTP
#define CONFIG_CMD_FUSE
/* I2C Configs */
@@ -31,11 +31,6 @@
#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_ARP_TIMEOUT 200UL
-/* Fuses */
-#ifdef CONFIG_CMD_FUSE
-#define CONFIG_MXC_OCOTP
-#endif
-
/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
@@ -57,9 +57,6 @@
/* MMC */
#define CONFIG_FSL_USDHC
-/* Fuses */
-#define CONFIG_MXC_OCOTP
-
/* Secure boot (HAB) support */
#ifdef CONFIG_SECURE_BOOT
#define CONFIG_CSF_SIZE 0x2000
@@ -42,9 +42,6 @@
/* MMC */
#define CONFIG_FSL_USDHC
-/* Fuses */
-#define CONFIG_MXC_OCOTP
-
#define CONFIG_ARMV7_SECURE_BASE 0x00900000
#define CONFIG_ARMV7_PSCI_1_0
@@ -19,10 +19,6 @@
/* Enable passing of ATAGs */
#define CONFIG_CMDLINE_TAG
-#ifdef CONFIG_CMD_FUSE
-#define CONFIG_MXC_OCOTP
-#endif
-
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)