From patchwork Tue Dec 4 12:26:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 1007591 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="XXCfR3Dm"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 438Ljp1ZcJz9s7W for ; Tue, 4 Dec 2018 23:27:58 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id C9AA6C222DF; Tue, 4 Dec 2018 12:27:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 89359C22272; Tue, 4 Dec 2018 12:26:50 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 843B7C22272; Tue, 4 Dec 2018 12:26:44 +0000 (UTC) Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lists.denx.de (Postfix) with ESMTPS id 59419C2224B for ; Tue, 4 Dec 2018 12:26:40 +0000 (UTC) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id wB4CQYWa120754; Tue, 4 Dec 2018 06:26:34 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1543926394; bh=EmE8FFjhloomG/zafTZrcLJM2sDnWt5igJbNL9n+OtE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=XXCfR3Dmdc1ptO1FG9YwhbjAbV0ujbDZT7ncFjrB3gOgADUv67vdXxnRg4y/NIk2U ux0xcc3xs/RFeOph9iPFLpq7VXfjkqiH9fBOw00eRj/VEOx11UC/9/g9/wGDNCJ3zR MncPLES6HefDO4JZbSABDHxZ23GSWD0igBDu5z6I= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id wB4CQXfg107304 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 4 Dec 2018 06:26:33 -0600 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Tue, 4 Dec 2018 06:26:33 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Tue, 4 Dec 2018 06:26:33 -0600 Received: from a0132425.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id wB4CQMWZ017678; Tue, 4 Dec 2018 06:26:28 -0600 From: Vignesh R To: Nobuhiro Iwamatsu , Heiko Schocher , Jagan Teki , Patrick Delaunay , Christophe Kerello , Patrice Chotard Date: Tue, 4 Dec 2018 17:56:49 +0530 Message-ID: <20181204122659.14720-2-vigneshr@ti.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181204122659.14720-1-vigneshr@ti.com> References: <20181204122659.14720-1-vigneshr@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: Tom Rini , u-boot@lists.denx.de, uboot-stm32@st-md-mailman.stormreply.com, Miquel Raynal , Fabio Estevam , Boris Brezillon Subject: [U-Boot] [RFC PATCH v2 01/11] spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modes X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" SPI controllers support all types of SPI modes including dual/quad bus widths. Therefore remove constraint wrt SPI mode from spi-mem layer. Signed-off-by: Vignesh R --- drivers/spi/spi-mem.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c index af9aef009a73..1da20b8de5c4 100644 --- a/drivers/spi/spi-mem.c +++ b/drivers/spi/spi-mem.c @@ -323,15 +323,6 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op) return -EIO; #else - /* U-Boot does not support parallel SPI data lanes */ - if ((op->cmd.buswidth != 1) || - (op->addr.nbytes && op->addr.buswidth != 1) || - (op->dummy.nbytes && op->dummy.buswidth != 1) || - (op->data.nbytes && op->data.buswidth != 1)) { - printf("Dual/Quad raw SPI transfers not supported\n"); - return -ENOTSUPP; - } - if (op->data.nbytes) { if (op->data.dir == SPI_MEM_DATA_IN) rx_buf = op->data.buf.in;