From patchwork Tue Nov 20 11:29:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 1000412 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=brainfault.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=brainfault-org.20150623.gappssmtp.com header.i=@brainfault-org.20150623.gappssmtp.com header.b="W9p7XFYd"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42zk6q2lQLz9s8F for ; Tue, 20 Nov 2018 22:31:15 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 18DB5C22012; Tue, 20 Nov 2018 11:30:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 7341EC22041; Tue, 20 Nov 2018 11:30:07 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id DB554C22035; Tue, 20 Nov 2018 11:29:59 +0000 (UTC) Received: from mail-pl1-f194.google.com (mail-pl1-f194.google.com [209.85.214.194]) by lists.denx.de (Postfix) with ESMTPS id A8A02C22038 for ; Tue, 20 Nov 2018 11:29:55 +0000 (UTC) Received: by mail-pl1-f194.google.com with SMTP id v1-v6so875288plo.2 for ; Tue, 20 Nov 2018 03:29:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=brainfault-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=x2OyrEDzvffMsek3go7QmwY5NE6BAji11AUCfoG8qOc=; b=W9p7XFYdrJyxICZi11imqw13No3Y61xZCm8yEFlfT7fzFAwfXoVtI1rKmle4CX2kUB 7Qaj8LBln13aBM5BdQSdw4yuzdu++fBCKL5dtzgvR9QjCpSGTp80wbFkfU/AavvDjbIO ZH+EuDeOTWHHaPs29swcrZHVWxTOzvFs9o0h2l36vINZh6HK9FMR7QsFCUVpxVM4+6le 87Ee3IBwKlSVb3uArDXxueHBXvvwcHKk7YoYMdOyYezXK/NeKsYDSGU0vOF+EfRIM4ox E8etnIG6wX5uA8lLDEJyY9F7o1uig2lGV3UrCbqQhnECqxlgYkE77Km7dAVSpHMv7ck7 ms1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=x2OyrEDzvffMsek3go7QmwY5NE6BAji11AUCfoG8qOc=; b=RL2lA//gXBBt9A8ySzBzdjTTMkpthtRQNj+5J9Lw+vwpCMw3Lz2iIwQJDyJ6L7Bjom f6Zg5jXnn6ee4ZvmH/Q+GdjEnGlULkL5Jhi8zf4MNPo1ryUz+1emPEmmUGupHcfbwZft LFlVM67iCTyL8w5LR5vq3iRX9hWsiPmQ/6Rt8OFvCqzX9X6CqW7XABpr8qI1PbcAYA34 ffVQpn9ZEE0gfKifF6TGQ6qbsGQGREPw29B9xR8GUkptOO1MrDC9MJmUVaQdMsFXbeVa 7BpEbJTS7SVNmVNH/z0Y1Q+WOYYizNm16Qc2DjSZrbf1tbqaDreLYMP7rRWAJslQLY72 hsCg== X-Gm-Message-State: AA+aEWYYhHPQJWdocSKIOh9OCu7bCb6vGIYsGEhRcYX2gQ4Sw+EGv5P6 oFO+1pubKs4rHbfNL6xPuBuKRA== X-Google-Smtp-Source: AFSGD/WrdP+erTiR6mRGFZhkpw7TQ4GMHMfHu/AmiFw4V9/tVyKZiWFSnl/+BH4bswUwox/eI1mnEg== X-Received: by 2002:a17:902:6185:: with SMTP id u5mr1819090plj.194.1542713394112; Tue, 20 Nov 2018 03:29:54 -0800 (PST) Received: from localhost.localdomain ([106.51.16.59]) by smtp.googlemail.com with ESMTPSA id m10-v6sm97725026pfg.180.2018.11.20.03.29.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 03:29:53 -0800 (PST) From: Anup Patel To: Rick Chen Date: Tue, 20 Nov 2018 16:59:32 +0530 Message-Id: <20181120112933.23700-3-anup@brainfault.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181120112933.23700-1-anup@brainfault.org> References: <20181120112933.23700-1-anup@brainfault.org> Cc: U-Boot Mailing List , Palmer Dabbelt , Alexander Graf , Christoph Hellwig , Atish Patra Subject: [U-Boot] [PATCH v2 2/3] riscv: qemu: Use different SYS_TEXT_BASE for S-mode X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" When u-boot runs in S-mode, the M-mode runtime firmware (BBL or equivalent) uses memory range in 0x80000000 to 0x80200000. Due to this, we cannot use 0x80000000 as SYS_TEXT_BASE when running in S-mode. Instead for S-mode, we use 0x80200000 as SYS_TEXT_BASE. Even Linux RISC-V kernel ignores/reserves memory range 0x80000000 to 0x80200000 because it runs in S-mode. Signed-off-by: Anup Patel Reviewed-by: Bin Meng Tested-by: Bin Meng --- board/emulation/qemu-riscv/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig index 33ca253432..56bb5337d4 100644 --- a/board/emulation/qemu-riscv/Kconfig +++ b/board/emulation/qemu-riscv/Kconfig @@ -13,7 +13,8 @@ config SYS_CONFIG_NAME default "qemu-riscv" config SYS_TEXT_BASE - default 0x80000000 + default 0x80000000 if !RISCV_SMODE + default 0x80200000 if RISCV_SMODE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y