@@ -18,6 +18,10 @@ static struct ccu_clk_map a10_clks[] = {
[CLK_AHB_OHCI0] = { 0x060, BIT(2), NULL },
[CLK_AHB_EHCI1] = { 0x060, BIT(3), NULL },
[CLK_AHB_OHCI1] = { 0x060, BIT(4), NULL },
+ [CLK_AHB_MMC0] = { 0x060, BIT(8), NULL },
+ [CLK_AHB_MMC1] = { 0x060, BIT(9), NULL },
+ [CLK_AHB_MMC2] = { 0x060, BIT(10), NULL },
+ [CLK_AHB_MMC3] = { 0x060, BIT(11), NULL },
[CLK_USB_OHCI0] = { 0x0cc, BIT(6), NULL },
[CLK_USB_OHCI1] = { 0x0cc, BIT(7), NULL },
@@ -16,6 +16,9 @@ static struct ccu_clk_map a10s_clks[] = {
[CLK_AHB_OTG] = { 0x060, BIT(0), NULL },
[CLK_AHB_EHCI] = { 0x060, BIT(1), NULL },
[CLK_AHB_OHCI] = { 0x060, BIT(2), NULL },
+ [CLK_AHB_MMC0] = { 0x060, BIT(8), NULL },
+ [CLK_AHB_MMC1] = { 0x060, BIT(9), NULL },
+ [CLK_AHB_MMC2] = { 0x060, BIT(10), NULL },
[CLK_USB_OHCI] = { 0x0cc, BIT(6), NULL },
[CLK_USB_PHY0] = { 0x0cc, BIT(8), NULL },
@@ -13,6 +13,9 @@
#include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
static struct ccu_clk_map a23_clks[] = {
+ [CLK_BUS_MMC0] = { 0x060, BIT(8), NULL },
+ [CLK_BUS_MMC1] = { 0x060, BIT(9), NULL },
+ [CLK_BUS_MMC2] = { 0x060, BIT(10), NULL },
[CLK_BUS_OTG] = { 0x060, BIT(24), NULL },
[CLK_BUS_EHCI] = { 0x060, BIT(26), NULL },
[CLK_BUS_OHCI] = { 0x060, BIT(29), NULL },
@@ -13,6 +13,10 @@
#include <dt-bindings/reset/sun6i-a31-ccu.h>
static struct ccu_clk_map a31_clks[] = {
+ [CLK_AHB1_MMC0] = { 0x060, BIT(8), NULL },
+ [CLK_AHB1_MMC1] = { 0x060, BIT(9), NULL },
+ [CLK_AHB1_MMC2] = { 0x060, BIT(10), NULL },
+ [CLK_AHB1_MMC3] = { 0x060, BIT(12), NULL },
[CLK_AHB1_OTG] = { 0x060, BIT(24), NULL },
[CLK_AHB1_EHCI0] = { 0x060, BIT(26), NULL },
[CLK_AHB1_EHCI1] = { 0x060, BIT(27), NULL },
@@ -13,6 +13,9 @@
#include <dt-bindings/reset/sun50i-a64-ccu.h>
static struct ccu_clk_map a64_clks[] = {
+ [CLK_BUS_MMC0] = { 0x060, BIT(8), NULL },
+ [CLK_BUS_MMC1] = { 0x060, BIT(9), NULL },
+ [CLK_BUS_MMC2] = { 0x060, BIT(10), NULL },
[CLK_BUS_OTG] = { 0x060, BIT(23), NULL },
[CLK_BUS_EHCI0] = { 0x060, BIT(24), NULL },
[CLK_BUS_EHCI1] = { 0x060, BIT(25), NULL },
@@ -13,6 +13,9 @@
#include <dt-bindings/reset/sun8i-a83t-ccu.h>
static struct ccu_clk_map a83t_clks[] = {
+ [CLK_BUS_MMC0] = { 0x060, BIT(8), NULL },
+ [CLK_BUS_MMC1] = { 0x060, BIT(9), NULL },
+ [CLK_BUS_MMC2] = { 0x060, BIT(10), NULL },
[CLK_BUS_OTG] = { 0x060, BIT(24), NULL },
[CLK_BUS_EHCI0] = { 0x060, BIT(26), NULL },
[CLK_BUS_EHCI1] = { 0x060, BIT(27), NULL },
@@ -13,6 +13,9 @@
#include <dt-bindings/reset/sun8i-h3-ccu.h>
static struct ccu_clk_map h3_clks[] = {
+ [CLK_BUS_MMC0] = { 0x060, BIT(8), NULL },
+ [CLK_BUS_MMC1] = { 0x060, BIT(9), NULL },
+ [CLK_BUS_MMC2] = { 0x060, BIT(10), NULL },
[CLK_BUS_OTG] = { 0x060, BIT(23), NULL },
[CLK_BUS_EHCI0] = { 0x060, BIT(24), NULL },
[CLK_BUS_EHCI1] = { 0x060, BIT(25), NULL },
@@ -13,6 +13,10 @@
#include <dt-bindings/reset/sun8i-r40-ccu.h>
static struct ccu_clk_map r40_clks[] = {
+ [CLK_BUS_MMC0] = { 0x060, BIT(8), NULL },
+ [CLK_BUS_MMC1] = { 0x060, BIT(9), NULL },
+ [CLK_BUS_MMC2] = { 0x060, BIT(10), NULL },
+ [CLK_BUS_MMC3] = { 0x060, BIT(11), NULL },
[CLK_BUS_OTG] = { 0x060, BIT(25), NULL },
[CLK_BUS_EHCI0] = { 0x060, BIT(26), NULL },
[CLK_BUS_EHCI1] = { 0x060, BIT(27), NULL },
@@ -13,6 +13,9 @@
#include <dt-bindings/reset/sun8i-v3s-ccu.h>
static struct ccu_clk_map v3s_clks[] = {
+ [CLK_BUS_MMC0] = { 0x060, BIT(8), NULL },
+ [CLK_BUS_MMC1] = { 0x060, BIT(9), NULL },
+ [CLK_BUS_MMC2] = { 0x060, BIT(10), NULL },
[CLK_BUS_OTG] = { 0x060, BIT(24), NULL },
[CLK_USB_PHY0] = { 0x0cc, BIT(8), NULL },
Implement AHB bus MMC clocks for all Allwinner SoC clock drivers via clock map descriptor table. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- drivers/clk/sunxi/clk_a10.c | 4 ++++ drivers/clk/sunxi/clk_a10s.c | 3 +++ drivers/clk/sunxi/clk_a23.c | 3 +++ drivers/clk/sunxi/clk_a31.c | 4 ++++ drivers/clk/sunxi/clk_a64.c | 3 +++ drivers/clk/sunxi/clk_a83t.c | 3 +++ drivers/clk/sunxi/clk_h3.c | 3 +++ drivers/clk/sunxi/clk_r40.c | 4 ++++ drivers/clk/sunxi/clk_v3s.c | 3 +++ 9 files changed, 30 insertions(+)