From patchwork Sun Jul 29 07:43:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Brodkin X-Patchwork-Id: 950528 X-Patchwork-Delegate: alexey.brodkin@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="lLHSjzT4"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 41dZVf5yXSz9s0R for ; Sun, 29 Jul 2018 17:45:14 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 58593C21E26; Sun, 29 Jul 2018 07:45:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 2DE12C21C6A; Sun, 29 Jul 2018 07:45:08 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 432C0C21C6A; Sun, 29 Jul 2018 07:45:07 +0000 (UTC) Received: from mail-lj1-f194.google.com (mail-lj1-f194.google.com [209.85.208.194]) by lists.denx.de (Postfix) with ESMTPS id A312FC21C4A for ; Sun, 29 Jul 2018 07:45:06 +0000 (UTC) Received: by mail-lj1-f194.google.com with SMTP id s12-v6so7821111ljj.0 for ; Sun, 29 Jul 2018 00:45:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=KTkzDn0SoLNZbP12bnnTAs4Ant8IrHlGIBwOc+fy9Ck=; b=lLHSjzT4dkQ8RuL9D4+foxRRDFWfoDTC2s3a0T6pdej8Bjn3sRSRab86J6Gyh1c+Ff +HVg6m/T9iAcn/pUtLVzThUpMLdObm7uJUv+nkAy95BNxmOfnGTnDO7B7tvjxIsRBm8v ibDqlJn+K7UG3R7LwYnuJzOm56JhrJ7hrDYTPE4AH9p0LCObBpnhNCpEzCyNB2HI35xK EMx9OQiE3ukho86VpdQND/iJOqBKIRjdsO4KfcegPWkjq3NOf/3IElHeXuZLK2xZ9cuq niGCa3Dy0CLBfeFejL2V7k+LmbjwlUuDOgYM8PqywoP1u4zmH67b2Y1o+xhtXbsDDS0v 96oQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=KTkzDn0SoLNZbP12bnnTAs4Ant8IrHlGIBwOc+fy9Ck=; b=B3DloNiJaon64QXOMGUYXFTd65TiUz9Oi5dnUmjnZt8RPtw4I3th4ugcI+7WhmYIql TTjyvrDO8KLxdzdugr7YOM/bZkmGEcXmrpqGBl7bwY2OqXp8Dx/PmMhtSBBmTMQc8QnI tRIbeg+vmgLijb8XXDMPoZP7o6+VJH6f1SyP1KF3zOJXbRhj/2DLRewtoZ7B55y7Pf3F YPI2UK9bgSPHIJeap53/lTeUJP/7Myf1CIfU/sICX4k5oN1zN6GhoL6P7axtGe/hlJwP Vp0SITdrad5wngYFP0Lnqj1NqsPnoLnhrpg/1McGVzSN3fZozM/bDE/F8qDnwmsNQY6I 2CCQ== X-Gm-Message-State: AOUpUlGglirrj2K5brWXD6+gWH0IHVIlVfo2v6nW+PGis2jtcz6K3Umq y5vMR+3AweGH9dHZFhlKnFGuA0sc X-Google-Smtp-Source: AAOMgpe4/QBViz4pqyivEllnUMt5r+PVqDWNMdRsl5eIQHYY1D4fY6qo49y0s8Ohz6GMFNEdLNHBgA== X-Received: by 2002:a2e:118f:: with SMTP id 15-v6mr9437061ljr.38.1532850305898; Sun, 29 Jul 2018 00:45:05 -0700 (PDT) Received: from abrodkin-7480l.local ([91.237.150.126]) by smtp.gmail.com with ESMTPSA id m29-v6sm1105410lfj.45.2018.07.29.00.45.04 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 29 Jul 2018 00:45:05 -0700 (PDT) From: Alexey Brodkin X-Google-Original-From: Alexey Brodkin To: u-boot@lists.denx.de Date: Sun, 29 Jul 2018 10:43:24 +0300 Message-Id: <20180729074324.16737-1-abrodkin@synopsys.com> X-Mailer: git-send-email 2.17.1 Cc: Alexey Brodkin , uboot-snps-arc@synopsys.com Subject: [U-Boot] [PATCH] ARC: Enable unaligned access in hardware if compiler uses it X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Even if ARC core might handle unaligned access to data this hardware feature by default is disabled. But GCC starting from 8.1.0 unconditionally uses it for ARC HS cores. Which leads to quite strange and fatal run-time failures like the one below if HW is not configured properly: | hsdk# sf probe | Misaligned data access exception @ 0xbff794d4 | ECR: 0x000d0000 | RET: 0xbff794d4 | BLINK: 0xbff79644 | STAT32: 0x00000800 | GP: 0x1003e000 r25: 0xbfd58f08 | BTA: 0xbff794a4 SP: 0xbfd58cd4 FP: 0xbfd58ef0 | LPS: 0xbff90240 LPE: 0xbff90244 LPC: 0x00000000 | r00: 0x00000000 r01: 0x00000003 r02: 0x000026bf | r03: 0x00000000 r04: 0x00000100 r05: 0x00000000 | r06: 0x00000001 r07: 0x00000000 r08: 0x1dcd6500 | r09: 0x00000000 r10: 0x00200000 r11: 0x00000000 | r12: 0x1b3d4440 r13: 0xbff9eca4 r14: 0xbfd59d68 | r15: 0xbfd60cd0 r16: 0x00000000 r17: 0x00000000 | r18: 0xbff9ed14 r19: 0xbfd59c78 r20: 0xbfd58d40 | r21: 0xbfd58d44 r22: 0x00000000 r23: 0x00000000 | r24: 0xbfd59ba8 | Resetting CPU ... Now we're checking for __ARC_UNALIGNED__ define emitted by the compiler if it's going to use unaligned access and then we force-enable it in hardware too. Signed-off-by: Alexey Brodkin --- arch/arc/include/asm/arcregs.h | 3 +++ arch/arc/lib/start.S | 9 +++++++++ 2 files changed, 12 insertions(+) diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h index 56ec11f789b5..9920d2e71952 100644 --- a/arch/arc/include/asm/arcregs.h +++ b/arch/arc/include/asm/arcregs.h @@ -19,6 +19,9 @@ #define ARC_AUX_IDENTITY 0x04 #define ARC_AUX_STATUS32 0x0a +/* STATUS32 Bits Positions */ +#define STATUS_AD_BIT 19 /* Enable unaligned access */ + /* Instruction cache related auxiliary registers */ #define ARC_AUX_IC_IVIC 0x10 #define ARC_AUX_IC_CTRL 0x11 diff --git a/arch/arc/lib/start.S b/arch/arc/lib/start.S index e573ce7718b9..84959b41bdf5 100644 --- a/arch/arc/lib/start.S +++ b/arch/arc/lib/start.S @@ -61,6 +61,15 @@ ENTRY(_start) 1: #endif +#ifdef __ARC_UNALIGNED__ + /* + * Enable handling of unaligned access in the CPU as by default + * this HW feature is disabled while GCC starting from 8.1.0 + * unconditionally uses it for ARC HS cores. + */ + flag 1 << STATUS_AD_BIT +#endif + /* Establish C runtime stack and frame */ mov %sp, CONFIG_SYS_INIT_SP_ADDR mov %fp, %sp