From patchwork Thu Apr 26 11:04:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 905004 X-Patchwork-Delegate: twarren@nvidia.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ziswiler.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40WvRq2140z9ryr for ; Thu, 26 Apr 2018 21:07:51 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id EEBC8C22083; Thu, 26 Apr 2018 11:06:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=SPF_HELO_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E678DC22083; Thu, 26 Apr 2018 11:05:50 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id C4654C2206C; Thu, 26 Apr 2018 11:05:38 +0000 (UTC) Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lists.denx.de (Postfix) with ESMTPS id 8A6FCC22064 for ; Thu, 26 Apr 2018 11:05:34 +0000 (UTC) Received: from marcel-pc.toradex.int.toradex.int ([46.140.72.82]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPA (Nemesis) id 0MOR1v-1fGrud40Tl-005rVk; Thu, 26 Apr 2018 13:05:19 +0200 From: Marcel Ziswiler To: u-boot@lists.denx.de Date: Thu, 26 Apr 2018 13:04:58 +0200 Message-Id: <20180426110502.16350-3-marcel@ziswiler.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180426110502.16350-1-marcel@ziswiler.com> References: <20180426110502.16350-1-marcel@ziswiler.com> X-Provags-ID: V03:K1:tTDcPzXHjyv8nASC1GqGqYsUfky/TSuo0RF8PWJnO1sR56uJNQY HFdWeQ77/rKO2STKnaCPO2s3Y0dZTGju5DOC8SdH6iq9rVE1A9WWPlBu17+aQekjpQ3yj5M UDrhe7l95kUaiDn2jGaClid5JILVqGncEtLoynkpgzlsYlr19OKK5nn4JkceAvjdTHJBhwf eDzVuMHhNLQqNuDLAR57g== X-UI-Out-Filterresults: notjunk:1; V01:K0:66nch34yFEo=:oBqjvcmt1G0c2/bx4vz3V3 0Uo2aoXQPecYOwJumVGumxwr8j2he+HQlvybY+zTByM4LpsnMMDnUeOyWgSuWtYjVPLdOQPkV 3wX9MhSys9794stkzhLPLzPAEs5fiu9TGl0lCWbU7/9cRr646Or/woF1RmDEaGJ/lFe2OfSH4 ktKIv8p42TI9ID0Mphd4ph+vOVAHEsVnQhazup/tGb5hu7GURl43BU+5pmbAZTV5qluop2XNx qMAtKfXrbAZc3fwRkjK+dCczBc+KylLE7O7GUAOcsothdreUR5IlFNCmKKMGDXCy9s5hFYrwc sI542rXazC2tTcIRGyZui2pX5CKExWR9xDnCEYy2deImp9trvU/hrDh9LEe1f8WGWfOUq8eIv JUNnbfTuE2wO2JGvdoq/p66Sa9U7IBLv0Tq8vcld06ST0Plojpqy5QT1wxd6jviuU0mzlvWoE xI1DXg+WktWBGzpyUQPhzHt4jKvLsOKg995AjZ+JLIdo7AfV+uRf1d9r2SDqGfLOkYAHfP8yX /1pEQ4nnYvHGFpFrUA2tEdVecUTq+F1ueN148IEdBqk2TdgC+2TSaSJP6i+OSdZfIoZg5D9LX pSIjOk0BtmcAxNzkvG6lM3JEkbmwQTfOZLE7Vmo8uIr0jtPkIPke15cfJYEVANmJokhCNpk9m zFnhFw3vNKorjvjy7eonSnZVqSL2rgrQizfegmjCm34wazxrNhVkSU19+d2KP2eHuYlg= Cc: Marcel Ziswiler , Tom Warren Subject: [U-Boot] [PATCH v5 2/6] apalis-tk1: add missing as3722 gpio0 configuration X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Marcel Ziswiler As the AS3722 GPIO0 is also a not connected on our Apalis TK1 module explicitly configure it to high-impedance as well. Signed-off-by: Marcel Ziswiler Reviewed-by: Simon Glass --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: - Add Simon's reviewed-by. arch/arm/dts/tegra124-apalis.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/tegra124-apalis.dts b/arch/arm/dts/tegra124-apalis.dts index 2fc0384d14..fe08d3ea73 100644 --- a/arch/arm/dts/tegra124-apalis.dts +++ b/arch/arm/dts/tegra124-apalis.dts @@ -1683,9 +1683,9 @@ bias-pull-up; }; - gpio1_3_4_5_6 { - pins = "gpio1", "gpio3", "gpio4", - "gpio5", "gpio6"; + gpio0_1_3_4_5_6 { + pins = "gpio0", "gpio1", "gpio3", + "gpio4", "gpio5", "gpio6"; bias-high-impedance; }; };