From patchwork Fri Apr 20 15:53:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Agner X-Patchwork-Id: 902012 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=agner.ch Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; secure) header.d=agner.ch header.i=@agner.ch header.b="DkzWJE6r"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40SLBp0zDVz9s1p for ; Sat, 21 Apr 2018 01:59:13 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 77E33C21E16; Fri, 20 Apr 2018 15:56:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED, SPF_HELO_PASS, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id BCA31C21D56; Fri, 20 Apr 2018 15:55:30 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id B18EFC21DDC; Fri, 20 Apr 2018 15:54:31 +0000 (UTC) Received: from mail.kmu-office.ch (mail.kmu-office.ch [178.209.48.109]) by lists.denx.de (Postfix) with ESMTPS id 59038C21D56 for ; Fri, 20 Apr 2018 15:54:27 +0000 (UTC) Received: from trochilidae.toradex.int (unknown [IPv6:2001:1620:c6e:10::3]) by mail.kmu-office.ch (Postfix) with ESMTPSA id C8E4E5C1776; Fri, 20 Apr 2018 17:54:26 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=agner.ch; s=dkim; t=1524239667; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:content-type:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0rfmPhOK0TXjm4VxKWaC0cy87r89Q9zzpEpCAUId4hA=; b=DkzWJE6raba5tSK3ONZpH02T3voDXTjEeRD8JwBXlqihfIidqpc51HaHoLk0y0TZVx3iox O3H5TZ04Bp7FnkJ6k4pPgT3WLzOO70LlAb53eb2tJJcHMnwo1VoKh4xiQeWwgL1HcdDlaF 1MhSgLQ3FlbucJav2ci0OlvCn7jpahY= From: Stefan Agner To: u-boot@lists.denx.de, Stefano Babic , oss@buserror.net Date: Fri, 20 Apr 2018 17:53:14 +0200 Message-Id: <20180420155314.8920-10-stefan@agner.ch> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180420155314.8920-1-stefan@agner.ch> References: <20180420155314.8920-1-stefan@agner.ch> X-Spamd-Result: default: False [-2.10 / 15.00]; RCVD_TLS_ALL(0.00)[]; ASN(0.00)[asn:13030, ipnet:2001:1620::/32, country:CH]; RCVD_COUNT_ZERO(0.00)[0]; FROM_HAS_DN(0.00)[]; MID_CONTAINS_FROM(1.00)[]; TO_DN_SOME(0.00)[]; MIME_GOOD(-0.10)[text/plain]; FROM_EQ_ENVFROM(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; BAYES_HAM(-3.00)[100.00%]; ARC_NA(0.00)[]; DKIM_SIGNED(0.00)[]; RCPT_COUNT_SEVEN(0.00)[10] Cc: marex@denx.de, Stefan Agner , Marcel Ziswiler , Max Krummenacher , han.xu@nxp.com Subject: [U-Boot] [PATCH v1 9/9] arm: dts: imx7: colibri: add raw NAND support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Stefan Agner Signed-off-by: Stefan Agner --- arch/arm/dts/imx7-colibri.dts | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm/dts/imx7-colibri.dts b/arch/arm/dts/imx7-colibri.dts index f6c21052ae..a3b5618b45 100644 --- a/arch/arm/dts/imx7-colibri.dts +++ b/arch/arm/dts/imx7-colibri.dts @@ -17,6 +17,15 @@ }; }; +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + fsl,use-minimum-ecc; + nand-on-flash-bbt; + nand-ecc-mode = "hw"; + status = "okay"; +}; + &i2c1 { pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; @@ -49,6 +58,25 @@ }; &iomuxc { + pinctrl_gpmi_nand: gpmi-nand-grp { + fsl,pins = < + MX7D_PAD_SD3_CLK__NAND_CLE 0x71 + MX7D_PAD_SD3_CMD__NAND_ALE 0x71 + MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B 0x71 + MX7D_PAD_SAI1_TX_DATA__NAND_READY_B 0x74 + MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71 + MX7D_PAD_SD3_RESET_B__NAND_WE_B 0x71 + MX7D_PAD_SD3_DATA0__NAND_DATA00 0x71 + MX7D_PAD_SD3_DATA1__NAND_DATA01 0x71 + MX7D_PAD_SD3_DATA2__NAND_DATA02 0x71 + MX7D_PAD_SD3_DATA3__NAND_DATA03 0x71 + MX7D_PAD_SD3_DATA4__NAND_DATA04 0x71 + MX7D_PAD_SD3_DATA5__NAND_DATA05 0x71 + MX7D_PAD_SD3_DATA6__NAND_DATA06 0x71 + MX7D_PAD_SD3_DATA7__NAND_DATA07 0x71 + >; + }; + pinctrl_i2c4: i2c4-grp { fsl,pins = < MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f