From patchwork Fri Mar 23 08:18:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Icenowy Zheng X-Patchwork-Id: 889806 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=aosc.io Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 406xSm3lH1z9s1B for ; Fri, 23 Mar 2018 19:26:00 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id D62A3C21DFA; Fri, 23 Mar 2018 08:25:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 0BBA1C21E1E; Fri, 23 Mar 2018 08:25:30 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 3F490C21DDC; Fri, 23 Mar 2018 08:24:49 +0000 (UTC) Received: from chocolate.ash.relay.mailchannels.net (chocolate.ash.relay.mailchannels.net [23.83.222.35]) by lists.denx.de (Postfix) with ESMTPS id 648DBC21E38 for ; Fri, 23 Mar 2018 08:24:43 +0000 (UTC) X-Sender-Id: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io Received: from relay.mailchannels.net (localhost [127.0.0.1]) by relay.mailchannels.net (Postfix) with ESMTP id 8F07F5C1051; Fri, 23 Mar 2018 08:24:41 +0000 (UTC) Received: from hermes.aosc.io (unknown [100.96.14.37]) (Authenticated sender: lmn-TZDUIOWCRQMW) by relay.mailchannels.net (Postfix) with ESMTPA id C775E5C10F6; Fri, 23 Mar 2018 08:24:40 +0000 (UTC) X-Sender-Id: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io Received: from hermes.aosc.io (hermes.aosc.io [172.18.63.202]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384) by 0.0.0.0:2500 (trex/5.13.1); Fri, 23 Mar 2018 08:24:41 +0000 X-MC-Relay: Neutral X-MailChannels-SenderId: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io X-MailChannels-Auth-Id: lmn-TZDUIOWCRQMW X-Towering-Shoe: 478bf7d067596236_1521793481403_2345525465 X-MC-Loop-Signature: 1521793481403:3980888837 X-MC-Ingress-Time: 1521793481403 Received: from localhost (localhost [127.0.0.1]) (Authenticated sender: icenowy@aosc.io) by hermes.aosc.io (Postfix) with ESMTPSA id 9FA4159F1E; Fri, 23 Mar 2018 08:24:37 +0000 (UTC) From: Icenowy Zheng To: Jagan Teki , Maxime Ripard , Andre Przywara , Chen-Yu Tsai Date: Fri, 23 Mar 2018 16:18:56 +0800 Message-Id: <20180323081857.57138-6-icenowy@aosc.io> In-Reply-To: <20180323081857.57138-1-icenowy@aosc.io> References: <20180323081857.57138-1-icenowy@aosc.io> Cc: u-boot@lists.denx.de, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [U-Boot] [PATCH v2 5/6] sunxi: add code for recalculating the DRAM size in U-Boot X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The get_ram_size() function in U-Boot can only deal with memory size smaller than 2GiB. To enable the support of 3GiB DRAM on newer 64-bit SoCs, an alternative way to detect DRAM size is needed. Add the possibility to use some DRAM size recalculating code in DRAM driver. Signed-off-by: Icenowy Zheng --- New patch in v2. arch/arm/include/asm/arch-sunxi/dram.h | 3 +++ arch/arm/mach-sunxi/Kconfig | 7 +++++++ board/sunxi/board.c | 8 ++++++++ 3 files changed, 18 insertions(+) diff --git a/arch/arm/include/asm/arch-sunxi/dram.h b/arch/arm/include/asm/arch-sunxi/dram.h index d08b82371d..7443fc3507 100644 --- a/arch/arm/include/asm/arch-sunxi/dram.h +++ b/arch/arm/include/asm/arch-sunxi/dram.h @@ -35,5 +35,8 @@ unsigned long long sunxi_dram_init(void); void mctl_await_completion(u32 *reg, u32 mask, u32 val); bool mctl_mem_matches(u32 offset); +#if defined(CONFIG_DRAM_CAN_RECALCULATE_SIZE) +unsigned long long sunxi_dram_recalculate_size(void); +#endif #endif /* _SUNXI_DRAM_H */ diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 029821c82d..b206472ead 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -6,6 +6,13 @@ config SPL_LDSCRIPT config IDENT_STRING default " Allwinner Technology" +config DRAM_CAN_RECALCULATE_SIZE + bool + help + Select this if the DRAM controller driver is capable of + re-calculating the size in main U-Boot. It's usable for + size bigger than 2GiB. + config DRAM_SUN4I bool help diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 73dd41437d..96192a7ec3 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -256,7 +256,16 @@ int board_init(void) int dram_init(void) { +#ifndef CONFIG_DRAM_CAN_RECALCULATE_SIZE gd->ram_size = get_ram_size((long *)PHYS_SDRAM_0, PHYS_SDRAM_0_SIZE); +#else + unsigned long long real_dram_size = sunxi_dram_recalculate_size(); + + if (real_dram_size > CONFIG_SUNXI_DRAM_MAX_SIZE) + gd->ram_size = CONFIG_SUNXI_DRAM_MAX_SIZE; + else + gd->ram_size = (phys_size_t)real_dram_size; +#endif return 0; }