[U-Boot,RFC,3/8] sun8i: Add a macro to read the silicon revision

From: "tpearson@raptorengineering.com" <tpearson@raptorengineering.com>

According to the user manuals released by Allwinner, the low 8-bit of
the 0x24 register in "System Control" (marked SRAMC in U-Boot source as
it controls some SRAMs' functionality since A10) is the silicon revision
of the chip.

This data is now important for A83T: according to the BSP source A83T
have two revisions: Revision A (with revision ID 0) and Revision B (with
revision ID 1); and revision B requires a SMP bringup workaround.

Print the revision number when the SoC is A83T, as it does matter there.

Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
[Icenowy: convert to macro so that it can be reused in PSCI code]
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 7 +++++++
 arch/arm/mach-sunxi/cpu_info.c              | 2 +-
 2 files changed, 8 insertions(+), 1 deletion(-)

On Wed, Jun 7, 2017 at 8:47 AM, Icenowy Zheng <icenowy@aosc.io> wrote:
> From: "tpearson@raptorengineering.com" <tpearson@raptorengineering.com>

Same thing with the author name.

>
> According to the user manuals released by Allwinner, the low 8-bit of
> the 0x24 register in "System Control" (marked SRAMC in U-Boot source as
> it controls some SRAMs' functionality since A10) is the silicon revision
> of the chip.
>
> This data is now important for A83T: according to the BSP source A83T
> have two revisions: Revision A (with revision ID 0) and Revision B (with
> revision ID 1); and revision B requires a SMP bringup workaround.
>
> Print the revision number when the SoC is A83T, as it does matter there.
>
> Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
> [Icenowy: convert to macro so that it can be reused in PSCI code]
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
>  arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 7 +++++++
>  arch/arm/mach-sunxi/cpu_info.c              | 2 +-
>  2 files changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
> index 6aa5e91ada..a96680d8e8 100644
> --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
> +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
> @@ -205,6 +205,13 @@ void sunxi_board_init(void);
>  void sunxi_reset(void);
>  int sunxi_get_ss_bonding_id(void);
>  int sunxi_get_sid(unsigned int *sid);
> +
> +/*
> + * Implement it as a macro, because it's used both in PSCI source code
> + * and normal U-Boot source code.
> + */
> +#define sunxi_get_revision() (readl(SUNXI_SRAMC_BASE + 0x24) & 0xff)

Ideally, please add a macro for the register offset.

> +
>  #endif /* __ASSEMBLY__ */
>
>  #endif /* _SUNXI_CPU_SUN4I_H */
> diff --git a/arch/arm/mach-sunxi/cpu_info.c b/arch/arm/mach-sunxi/cpu_info.c
> index 25a5ec26a0..4236ab8f11 100644
> --- a/arch/arm/mach-sunxi/cpu_info.c
> +++ b/arch/arm/mach-sunxi/cpu_info.c
> @@ -84,7 +84,7 @@ int print_cpuinfo(void)
>  #elif defined CONFIG_MACH_SUN8I_A33
>         printf("CPU:   Allwinner A33 (SUN8I %04x)\n", sunxi_get_sram_id());
>  #elif defined CONFIG_MACH_SUN8I_A83T
> -       printf("CPU:   Allwinner A83T (SUN8I %04x)\n", sunxi_get_sram_id());
> +       printf("CPU:   Allwinner A83T (SUN8I %04x rev. %x)\n", sunxi_get_sram_id(), sunxi_get_revision());

Please wrap the line to under 80 characters.

Otherwise,

Reviewed-by: Chen-Yu Tsai <wens@csie.org>

>  #elif defined CONFIG_MACH_SUN8I_H3
>         printf("CPU:   Allwinner H3 (SUN8I %04x)\n", sunxi_get_sram_id());
>  #elif defined CONFIG_MACH_SUN8I_R40
> --
> 2.12.2
>
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