| Message ID | 20170417192146.50592-1-icenowy@aosc.io |
|---|---|
| State | Changes Requested |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show |
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 609ce63b3e..5144c27535 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -313,7 +313,7 @@ config DRAM_ODT_CORRECTION endif config SYS_CLK_FREQ - default 816000000 if MACH_SUN50I + default 816000000 if MACH_SUN50I || MACH_SUN50I_H5 default 912000000 if MACH_SUN7I default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I || MACH_SUN9I
Most Allwinner H5 boards start with VDD-CPUX at 1.1V (e.g. Orange Pi PC2, NanoPi NEO2). Clocking it at 1008MHz is not so safe, and have shown frequent CPU hang on my NanoPi NEO2 board. Currently the ATF will also clock the system to 816MHz at boot. So assign the default clock rate of H5 to 816MHz, as it's a more reasonable and more safe value. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> --- board/sunxi/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)