From patchwork Tue Jan 31 21:37:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 722282 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3vCfnT6Lkhz9s2G for ; Wed, 1 Feb 2017 08:40:29 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9CF56B3902; Tue, 31 Jan 2017 22:39:20 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id oxVMIt4HEb6p; Tue, 31 Jan 2017 22:39:20 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AC54AB3908; Tue, 31 Jan 2017 22:39:08 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5F7D5B3871 for ; Tue, 31 Jan 2017 22:38:58 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 52YhadlPyZqu for ; Tue, 31 Jan 2017 22:38:58 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from fllnx209.ext.ti.com (fllnx209.ext.ti.com [198.47.19.16]) by theia.denx.de (Postfix) with ESMTPS id 99C77B3900 for ; Tue, 31 Jan 2017 22:38:25 +0100 (CET) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v0VLbPEC022753; Tue, 31 Jan 2017 15:37:25 -0600 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v0VLbKTe012942; Tue, 31 Jan 2017 15:37:20 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.294.0; Tue, 31 Jan 2017 15:37:19 -0600 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v0VLbJVC012025; Tue, 31 Jan 2017 15:37:19 -0600 Received: from localhost (uda0226610.am.dhcp.ti.com [128.247.83.96]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id v0VLbJ316381; Tue, 31 Jan 2017 15:37:19 -0600 (CST) From: Grygorii Strashko To: Lokesh Vutla , Lukasz Majewski , Tom Rini , Scott Wood , Simon Glass Date: Tue, 31 Jan 2017 15:37:12 -0600 Message-ID: <20170131213717.30745-11-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.10.1.dirty In-Reply-To: <20170131213717.30745-1-grygorii.strashko@ti.com> References: <20170131213717.30745-1-grygorii.strashko@ti.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH v2 10/15] drivers: nand: implement a NAND uclass X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Mugunthan V N Implement a NAND uclass so that the NAND devices can be accessed via the DM framework. Signed-off-by: Mugunthan V N Signed-off-by: Grygorii Strashko --- drivers/mtd/nand/Kconfig | 10 ++++++++++ drivers/mtd/nand/Makefile | 2 ++ drivers/mtd/nand/nand-uclass.c | 38 ++++++++++++++++++++++++++++++++++++++ drivers/mtd/nand/nand.c | 17 +++++++++++++++-- include/dm/uclass-id.h | 1 + 5 files changed, 66 insertions(+), 2 deletions(-) create mode 100644 drivers/mtd/nand/nand-uclass.c diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index 65bb040..a96b646 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig @@ -1,5 +1,15 @@ menu "NAND Device Support" +config DM_NAND + bool "Enable driver model for NAND" + depends on DM + help + Enable driver model for NAND. The NAND interface is then + implemented by the NAND uclass. Multiple NAND devices can + be attached and used. The 'nand' command works as normal. + + If the NAND drivers doesn't support DM, say N. + config SYS_NAND_SELF_INIT bool help diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index fd4bb66..83a986a 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@ -38,6 +38,8 @@ endif # not spl ifdef NORMAL_DRIVERS +obj-$(CONFIG_DM_NAND) += nand-uclass.o + obj-$(CONFIG_NAND_ECC_BCH) += nand_bch.o obj-$(CONFIG_NAND_ATMEL) += atmel_nand.o diff --git a/drivers/mtd/nand/nand-uclass.c b/drivers/mtd/nand/nand-uclass.c new file mode 100644 index 0000000..403c363 --- /dev/null +++ b/drivers/mtd/nand/nand-uclass.c @@ -0,0 +1,38 @@ +/* + * NAND uclass driver for NAND bus. + * + * (C) Copyright 2017 + * Texas Instruments Incorporated, + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +struct mtd_info *get_nand_dev_by_index(int idx) +{ + struct nand_chip *chip; + struct udevice *dev; + int ret; + + ret = uclass_get_device(UCLASS_NAND, idx, &dev); + if (ret) { + debug("NAND device (%d) not found\n", idx); + return NULL; + } + + chip = (struct nand_chip *)dev_get_priv(dev); + + return nand_to_mtd(chip); +} + +UCLASS_DRIVER(nand) = { + .id = UCLASS_NAND, + .name = "nand", + .flags = DM_UC_FLAG_SEQ_ALIAS, +}; diff --git a/drivers/mtd/nand/nand.c b/drivers/mtd/nand/nand.c index 18c346a..408b7ef 100644 --- a/drivers/mtd/nand/nand.c +++ b/drivers/mtd/nand/nand.c @@ -21,7 +21,7 @@ int nand_curr_device = -1; struct mtd_info *nand_info[CONFIG_SYS_MAX_NAND_DEVICE]; -#ifndef CONFIG_SYS_NAND_SELF_INIT +#if !defined(CONFIG_SYS_NAND_SELF_INIT) && !defined(CONFIG_DM_NAND) static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE]; static ulong base_address[CONFIG_SYS_MAX_NAND_DEVICE] = CONFIG_SYS_NAND_BASE_LIST; #endif @@ -30,6 +30,7 @@ static char dev_name[CONFIG_SYS_MAX_NAND_DEVICE][8]; static unsigned long total_nand_size; /* in kiB */ +#ifndef CONFIG_DM_NAND struct mtd_info *get_nand_dev_by_index(int dev) { if (dev < 0 || dev >= CONFIG_SYS_MAX_NAND_DEVICE || @@ -40,6 +41,7 @@ struct mtd_info *get_nand_dev_by_index(int dev) return nand_info[dev]; } +#endif int nand_mtd_to_devnum(struct mtd_info *mtd) { @@ -59,8 +61,9 @@ int nand_register(int devnum, struct mtd_info *mtd) if (devnum >= CONFIG_SYS_MAX_NAND_DEVICE) return -EINVAL; +#if !defined(CONFIG_SYS_NAND_SELF_INIT) && !defined(CONFIG_DM_NAND) nand_info[devnum] = mtd; - +#endif sprintf(dev_name[devnum], "nand%d", devnum); mtd->name = dev_name[devnum]; @@ -83,18 +86,28 @@ int nand_register(int devnum, struct mtd_info *mtd) #ifndef CONFIG_SYS_NAND_SELF_INIT static void nand_init_chip(int i) { +#ifndef CONFIG_DM_NAND struct nand_chip *nand = &nand_chip[i]; struct mtd_info *mtd = nand_to_mtd(nand); ulong base_addr = base_address[i]; +#else + struct mtd_info *mtd; +#endif int maxchips = CONFIG_SYS_NAND_MAX_CHIPS; if (maxchips < 1) maxchips = 1; +#ifdef CONFIG_DM_NAND + mtd = get_nand_dev_by_index(i); + if (!mtd) + return; +#else nand->IO_ADDR_R = nand->IO_ADDR_W = (void __iomem *)base_addr; if (board_nand_init(nand)) return; +#endif if (nand_scan(mtd, maxchips)) return; diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 8c92d0b..6556dc8 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -49,6 +49,7 @@ enum uclass_id { UCLASS_MMC, /* SD / MMC card or chip */ UCLASS_MOD_EXP, /* RSA Mod Exp device */ UCLASS_MTD, /* Memory Technology Device (MTD) device */ + UCLASS_NAND, /* NAND device */ UCLASS_NORTHBRIDGE, /* Intel Northbridge / SDRAM controller */ UCLASS_PANEL, /* Display panel, such as an LCD */ UCLASS_PANEL_BACKLIGHT, /* Backlight controller for panel */