diff mbox

[U-Boot,PATCHv2] socfpga: initialize designware ethernet

Message ID 20140713080650.GA19607@amd.pavel.ucw.cz
State Superseded
Delegated to: Albert ARIBAUD
Headers show

Commit Message

Pavel Machek July 13, 2014, 8:06 a.m. UTC 
Enable initialization fo designware ethernet controller. With this
patch, ethernet works in my configuration, provided I set ethernet
address in the environment.

Signed-off-by: Pavel Machek <pavel@denx.de>

---

Changes from v1: moved ethernet initialization to arch/arm, as
suggested by Marek.

Comments

Marek Vasut July 13, 2014, 1:30 p.m. UTC | #1 
On Sunday, July 13, 2014 at 10:06:50 AM, Pavel Machek wrote:
[...]
> @@ -14,3 +16,19 @@ int dram_init(void)
>  	gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
>  	return 0;
>  }
> +
> +
> +/*
> + * DesignWare Ethernet initialization
> + */
> +/* We know all the init functions have been run now */
> +int board_eth_init(bd_t *bis)

This would be cpu_eth_init()

> +{
> +#if !defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) && !defined(CONFIG_SPL_BUILD)
> +       /* initialize and register the emac */
> +	return designware_initialize(CONFIG_EMAC_BASE,
> +				     CONFIG_PHY_INTERFACE_MODE);
> +#else
> +	return 0;
> +#endif
> +}
[...]
Best regards,
Marek Vasut
diff mbox

Patch

diff --git a/arch/arm/cpu/armv7/socfpga/misc.c b/arch/arm/cpu/armv7/socfpga/misc.c
index 2f1c716..6c64f28 100644
--- a/arch/arm/cpu/armv7/socfpga/misc.c
+++ b/arch/arm/cpu/armv7/socfpga/misc.c
@@ -6,6 +6,8 @@ 
 
 #include <common.h>
 #include <asm/io.h>
+#include <miiphy.h>
+#include <netdev.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -14,3 +16,19 @@  int dram_init(void)
 	gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
 	return 0;
 }
+
+
+/*
+ * DesignWare Ethernet initialization
+ */
+/* We know all the init functions have been run now */
+int board_eth_init(bd_t *bis)
+{
+#if !defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) && !defined(CONFIG_SPL_BUILD)
+       /* initialize and register the emac */
+	return designware_initialize(CONFIG_EMAC_BASE,
+				     CONFIG_PHY_INTERFACE_MODE);
+#else
+	return 0;
+#endif
+}
diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
index f564046..a6d1680 100644
--- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
+++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
@@ -14,5 +14,7 @@ 
 #define SOCFPGA_CLKMGR_ADDRESS 0xffd04000
 #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
 #define SOCFPGA_SYSMGR_ADDRESS 0xffd08000
+#define SOCFPGA_EMAC0_ADDRESS 0xff700000
+#define SOCFPGA_EMAC1_ADDRESS 0xff702000
 
 #endif /* _SOCFPGA_BASE_ADDRS_H_ */
diff --git a/board/altera/socfpga/socfpga_cyclone5.c b/board/altera/socfpga/socfpga_cyclone5.c
index a960eb6..5cbe695 100644
--- a/board/altera/socfpga/socfpga_cyclone5.c
+++ b/board/altera/socfpga/socfpga_cyclone5.c
@@ -8,8 +9,6 @@ 
 #include <asm/arch/reset_manager.h>
 #include <asm/io.h>
 
-#include <netdev.h>
-
 DECLARE_GLOBAL_DATA_PTR;
 
 #if defined(CONFIG_DISPLAY_CPUINFO)
@@ -60,12 +59,3 @@  int overwrite_console(void)
 	return 0;
 }
 #endif
-
-/*
- * DesignWare Ethernet initialization
- */
-/* We know all the init functions have been run now */
-int board_eth_init(bd_t *bis)
-{
-	return 0;
-}
diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h
index 0254249..c9c8e53 100644
--- a/include/configs/socfpga_cyclone5.h
+++ b/include/configs/socfpga_cyclone5.h
@@ -206,6 +209,38 @@ 
 #define CONFIG_ENV_IS_NOWHERE
 
 /*
+ * network support
+ */
+#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET
+#define CONFIG_DESIGNWARE_ETH          1
+#endif
+
+#ifdef CONFIG_DESIGNWARE_ETH
+#define CONFIG_EMAC0_BASE              SOCFPGA_EMAC0_ADDRESS
+#define CONFIG_EMAC1_BASE              SOCFPGA_EMAC1_ADDRESS
+/* console support for network */
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+/* designware */
+#define CONFIG_NET_MULTI
+#define CONFIG_DW_ALTDESCRIPTOR
+#define CONFIG_DW_SEARCH_PHY
+#define CONFIG_MII
+#define CONFIG_PHY_GIGE
+#define CONFIG_DW_AUTONEG
+#define CONFIG_AUTONEG_TIMEOUT         (15 * CONFIG_SYS_HZ)
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_MICREL
+#define CONFIG_PHY_MICREL_KSZ9021
+/* EMAC controller and PHY used */
+#define CONFIG_EMAC_BASE               CONFIG_EMAC1_BASE
+#define CONFIG_EPHY_PHY_ADDR           CONFIG_EPHY1_PHY_ADDR
+#define CONFIG_PHY_INTERFACE_MODE      PHY_INTERFACE_MODE_RGMII
+#endif /* CONFIG_DESIGNWARE_ETH */
+
+/*
  * SPL "Second Program Loader" aka Initial Software
  */