From patchwork Wed Aug 10 20:33:30 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Jarrige X-Patchwork-Id: 109443 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id A995EB6F76 for ; Thu, 11 Aug 2011 06:36:37 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D522A283BA; Wed, 10 Aug 2011 22:36:32 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ylyEZJB+Ony0; Wed, 10 Aug 2011 22:36:32 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 29F8C283AB; Wed, 10 Aug 2011 22:36:31 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 90391283A2 for ; Wed, 10 Aug 2011 22:36:29 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 3HP9TTxdJtiI for ; Wed, 10 Aug 2011 22:36:29 +0200 (CEST) X-Greylist: delayed 574 seconds by postgrey-1.27 at theia; Wed, 10 Aug 2011 22:36:25 CEST X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 IN_IX_MANITU=4.35 (only DNSBL check requested) Received: from mo5.mail-out.ovh.net (5.mo5.mail-out.ovh.net [87.98.173.103]) by theia.denx.de (Postfix) with ESMTP id 7C85A283BC for ; Wed, 10 Aug 2011 22:36:25 +0200 (CEST) Received: from mail409.ha.ovh.net (b7.ovh.net [213.186.33.57]) by mo5.mail-out.ovh.net (Postfix) with SMTP id 9AC1D10008BB for ; Wed, 10 Aug 2011 22:27:09 +0200 (CEST) Received: from b0.ovh.net (HELO queueout) (213.186.33.50) by b0.ovh.net with SMTP; 10 Aug 2011 22:27:00 +0200 Received: from 85-218-50-42.dclient.lsne.ch (HELO shuttle2.etheralp.ch) (85.218.50.42) by ns0.ovh.net with SMTP; 10 Aug 2011 22:26:59 +0200 Received: from localhost ([127.0.0.1] helo=shuttle2.etheralp.ch) by shuttle2.etheralp.ch with esmtp (Exim 4.72) (envelope-from ) id 1QrFT0-0005aY-NU; Wed, 10 Aug 2011 22:33:30 +0200 X-Ovh-Mailout: 178.32.228.5 (mo5.mail-out.ovh.net) To: u-boot@lists.denx.de From: Eric Jarrige Date: Wed, 10 Aug 2011 22:33:30 +0200 Message-ID: <20110810203330.21204.88742.stgit@shuttle2.etheralp.ch> In-Reply-To: <20110810200828.21204.60050.stgit@shuttle2.etheralp.ch> References: <20110810200828.21204.60050.stgit@shuttle2.etheralp.ch> User-Agent: StGit/0.15 MIME-Version: 1.0 X-Ovh-Tracer-Id: 16830796233870294298 X-Ovh-Remote: 85.218.50.42 (85-218-50-42.dclient.lsne.ch) X-Ovh-Local: 213.186.33.20 (ns0.ovh.net) X-Spam-Check: DONE|U 0.500093/N X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfedvjedrtdejucetggdotefuucfrrhhofhhilhgvmecuqfggjfenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm Cc: biggerbadderben@gmail.com Subject: [U-Boot] [PATCH 6/9] mx1: improve PLL freq computation X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Improve PLL freq computation by using the full resolution of the PLL registers Signed-off-by: Eric Jarrige Cc: Stefano Babic --- arch/arm/cpu/arm920t/imx/speed.c | 29 +++++++++++------------------ 1 files changed, 11 insertions(+), 18 deletions(-) diff --git a/arch/arm/cpu/arm920t/imx/speed.c b/arch/arm/cpu/arm920t/imx/speed.c index 1e29698..b1c2bd6 100644 --- a/arch/arm/cpu/arm920t/imx/speed.c +++ b/arch/arm/cpu/arm920t/imx/speed.c @@ -36,33 +36,26 @@ * the specified bus in HZ. */ /* ------------------------------------------------------------------------- */ - -ulong get_systemPLLCLK(void) +static ulong get_PLLCLK(u32 sys_clk_freq, u32 pllctl0) { /* FIXME: We assume System_SEL = 0 here */ - u32 spctl0 = SPCTL0; - u32 mfi = (spctl0 >> 10) & 0xf; - u32 mfn = spctl0 & 0x3f; - u32 mfd = (spctl0 >> 16) & 0x3f; - u32 pd = (spctl0 >> 26) & 0xf; + u32 mfi = (pllctl0 >> 10) & 0xf; + u32 mfn = pllctl0 & 0x3ff; + u32 mfd = (pllctl0 >> 16) & 0x3ff; + u32 pd = (pllctl0 >> 26) & 0xf; mfi = mfi<=5 ? 5 : mfi; + return (2*(u64)sys_clk_freq * (mfi*(mfd+1) + mfn))/((mfd+1)*(pd+1)); +} - return (2*(CONFIG_SYSPLL_CLK_FREQ>>10)*( (mfi<<10) + (mfn<<10)/(mfd+1)))/(pd+1); +ulong get_systemPLLCLK(void) +{ + return get_PLLCLK(CONFIG_SYSPLL_CLK_FREQ, SPCTL0); } ulong get_mcuPLLCLK(void) { - /* FIXME: We assume System_SEL = 0 here */ - u32 mpctl0 = MPCTL0; - u32 mfi = (mpctl0 >> 10) & 0xf; - u32 mfn = mpctl0 & 0x3f; - u32 mfd = (mpctl0 >> 16) & 0x3f; - u32 pd = (mpctl0 >> 26) & 0xf; - - mfi = mfi<=5 ? 5 : mfi; - - return (2*(CONFIG_SYS_CLK_FREQ>>10)*( (mfi<<10) + (mfn<<10)/(mfd+1)))/(pd+1); + return get_PLLCLK(CONFIG_SYS_CLK_FREQ, MPCTL0); } ulong get_FCLK(void)