| Message ID | 1675154554-88217-12-git-send-email-ye.li@nxp.com |
|---|---|
| State | Accepted |
| Commit | 90e43bc136facb5ea965c40c878997d823f36257 |
| Delegated to: | Stefano Babic |
| Headers | show |
| Series | Add i.MX8ULP A1 revision support | expand |
> From: Peng Fan <peng.fan@nxp.com> > The swton indicates the logic switch, magic number 0xfff80 is hard > to understand, so use macro. > Some board design may not have MIPI_CSI voltage input connected per > data sheet. In that case, the upower power on API may dead loop mu to wait > response, however there is no response. So remove MIPI_CSI here, let > linux power domain driver to runtime enable the power domain. > Reviewed-by: Ye Li <ye.li@nxp.com> > Signed-off-by: Peng Fan <peng.fan@nxp.com> Applied to u-boot-imx, -next, thanks ! Best regards, Stefano Babic
diff --git a/arch/arm/mach-imx/imx8ulp/upower/upower_hal.c b/arch/arm/mach-imx/imx8ulp/upower/upower_hal.c index b6811d5..370685e 100644 --- a/arch/arm/mach-imx/imx8ulp/upower/upower_hal.c +++ b/arch/arm/mach-imx/imx8ulp/upower/upower_hal.c @@ -11,6 +11,25 @@ #include "upower_api.h" #define UPOWER_AP_MU1_ADDR 0x29280000 + +#define PS_RTD BIT(0) +#define PS_DSP BIT(1) +#define PS_A35_0 BIT(2) +#define PS_A35_1 BIT(3) +#define PS_L2 BIT(4) +#define PS_FAST_NIC BIT(5) +#define PS_APD_PERIPH BIT(6) +#define PS_GPU3D BIT(7) +#define PS_HIFI4 BIT(8) +#define PS_DDR GENMASK(12, 9) +#define PS_PXP_EPDC BIT(13) +#define PS_MIPI_DSI BIT(14) +#define PS_MIPI_CSI BIT(15) +#define PS_NIC_LPAV BIT(16) +#define PS_FUSION_AO BIT(17) +#define PS_FUSE BIT(18) +#define PS_UPOWER BIT(19) + static struct mu_type *muptr = (struct mu_type *)UPOWER_AP_MU1_ADDR; void upower_wait_resp(void) @@ -140,7 +159,8 @@ int upower_init(void) } } while (0); - swton = 0xfff80; + swton = PS_UPOWER | PS_FUSE | PS_FUSION_AO | PS_NIC_LPAV | PS_PXP_EPDC | PS_DDR | + PS_HIFI4 | PS_GPU3D | PS_MIPI_DSI; ret = upwr_pwm_power_on(&swton, NULL, NULL); if (ret) printf("Turn on switches fail %d\n", ret);