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bh=TdUcscY1Pkvyyi6Q4ieyt+lprcxusutD9081mc/brc8=; b=n2GNVAB2I5w+em8reWP1z+AYc0H2i+ejMk5vtxtqxgNj4E/Bw0qKU82TvvncuCsz1/ A+x/fh4n+RFiZrZOelDbTs015VGzZv2lEKW6ivzlD0vQa+MMx3D9xMaVrRu1e7o82hru MCnDx27jEIuRjdGNKLlAImp/UBWz65NVYrhhsdw30F58SrChiOJEpv7bcUQA5oxpQIMk hz+KyLLiIkeKr+//qHxnmuqNocg6pNEiZ8RLL4urdloUOtsBsDJ58mh5+spiRZCXgThY NA3HrEKNCqdB8CIDVVOlkczGuMsM71//Up5CRfPhJTGRN39Wl+RFkjLMNxBllYZlvBrM /psw== X-Gm-Message-State: AOAM530DXoALRALhLehg2O2LXdfI/dDlPm1fDbZ6hVkxJ6Joh+DtiGDo 7OzEi78QRPgrtVX14CRqTXM= X-Google-Smtp-Source: ABdhPJwxnyu+8mxE6qNQh/K9srgshTY9d9qsSNiQvQvX1cvSIwZvmhcBJUZmIKelWRDPJpaz847t0g== X-Received: by 2002:a63:3ecb:: with SMTP id l194mr11966098pga.146.1617953337437; Fri, 09 Apr 2021 00:28:57 -0700 (PDT) Received: from fmin-OptiPlex-7060.nreal.work ([137.59.103.165]) by smtp.gmail.com with ESMTPSA id j3sm1344432pfc.49.2021.04.09.00.28.53 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 09 Apr 2021 00:28:56 -0700 (PDT) From: dillon.minfei@gmail.com To: kever.yang@rock-chips.com, andre.przywara@arm.com, priyanka.jain@nxp.com, jagan@amarulasolutions.com, narmstrong@baylibre.com, marex@denx.de, aford173@gmail.com, ioana.ciornei@nxp.com, josip.kelecic@sartura.hr, festevam@gmail.com, hs@denx.de, heiko.stuebner@theobroma-systems.com, u-boot@lists.denx.de, patrice.chotard@foss.st.com, patrick.delaunay@foss.st.com, uboot-stm32@st-md-mailman.stormreply.com, sjg@chromium.org Cc: dillon min Subject: [PATCH v5 1/7] ARM: dts: stm32: split sdram pin & timing parameter into specific board dts Date: Fri, 9 Apr 2021 15:28:40 +0800 Message-Id: <1617953326-3110-2-git-send-email-dillon.minfei@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1617953326-3110-1-git-send-email-dillon.minfei@gmail.com> References: <1617953326-3110-1-git-send-email-dillon.minfei@gmail.com> X-Mailman-Approved-At: Fri, 09 Apr 2021 13:44:19 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean From: dillon min As different boards has their own sdram hw connection, mount different sdram modules, so move sdram timing parameter and pin configuration to their board device tree. Signed-off-by: dillon min Reviewed-by: Patrice Chotard --- v5: no changes arch/arm/dts/stm32h7-u-boot.dtsi | 100 ++---------------------------- arch/arm/dts/stm32h743i-disco-u-boot.dtsi | 98 +++++++++++++++++++++++++++++ arch/arm/dts/stm32h743i-eval-u-boot.dtsi | 98 +++++++++++++++++++++++++++++ 3 files changed, 201 insertions(+), 95 deletions(-) diff --git a/arch/arm/dts/stm32h7-u-boot.dtsi b/arch/arm/dts/stm32h7-u-boot.dtsi index 54dd406..84dc765 100644 --- a/arch/arm/dts/stm32h7-u-boot.dtsi +++ b/arch/arm/dts/stm32h7-u-boot.dtsi @@ -20,6 +20,7 @@ gpio9 = &gpioj; gpio10 = &gpiok; mmc0 = &sdmmc1; + pinctrl0 = &pinctrl; }; soc { @@ -36,30 +37,6 @@ pinctrl-0 = <&fmc_pins>; pinctrl-names = "default"; status = "okay"; - - /* - * Memory configuration from sdram datasheet IS42S32800G-6BLI - * first bank is bank@0 - * second bank is bank@1 - */ - bank1: bank@1 { - st,sdram-control = /bits/ 8 ; - st,sdram-timing = /bits/ 8 ; - st,sdram-refcount = <1539>; - }; }; }; }; @@ -136,77 +113,6 @@ compatible = "st,stm32-gpio"; }; -&pinctrl { - fmc_pins: fmc@0 { - pins { - pinmux = , - , - , - , - , - , - , - - , - , - , - , - , - , - , - , - , - , - , - - , - , - , - , - , - , - , - , - , - , - , - - , - , - , - , - , - , - , - - , - , - , - , - , - , - , - , - , - , - , - - , - , - , - , - , - , - , - , - , - ; - - slew-rate = <3>; - }; - }; -}; - &pwrcfg { u-boot,dm-pre-reloc; }; @@ -222,3 +128,7 @@ &timer5 { u-boot,dm-pre-reloc; }; + +&pinctrl { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/stm32h743i-disco-u-boot.dtsi b/arch/arm/dts/stm32h743i-disco-u-boot.dtsi index 5965afc..02e28c6 100644 --- a/arch/arm/dts/stm32h743i-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32h743i-disco-u-boot.dtsi @@ -1,3 +1,101 @@ // SPDX-License-Identifier: GPL-2.0+ #include + +&fmc { + + /* + * Memory configuration from sdram datasheet IS42S32800G-6BLI + * first bank is bank@0 + * second bank is bank@1 + */ + bank1: bank@1 { + st,sdram-control = /bits/ 8 ; + st,sdram-timing = /bits/ 8 ; + st,sdram-refcount = <1539>; + }; +}; + +&pinctrl { + fmc_pins: fmc@0 { + pins { + pinmux = , + , + , + , + , + , + , + + , + , + , + , + , + , + , + , + , + , + , + + , + , + , + , + , + , + , + , + , + , + , + + , + , + , + , + , + , + , + + , + , + , + , + , + , + , + , + , + , + , + + , + , + , + , + , + , + , + , + , + ; + + slew-rate = <3>; + }; + }; +}; diff --git a/arch/arm/dts/stm32h743i-eval-u-boot.dtsi b/arch/arm/dts/stm32h743i-eval-u-boot.dtsi index 5965afc..02e28c6 100644 --- a/arch/arm/dts/stm32h743i-eval-u-boot.dtsi +++ b/arch/arm/dts/stm32h743i-eval-u-boot.dtsi @@ -1,3 +1,101 @@ // SPDX-License-Identifier: GPL-2.0+ #include + +&fmc { + + /* + * Memory configuration from sdram datasheet IS42S32800G-6BLI + * first bank is bank@0 + * second bank is bank@1 + */ + bank1: bank@1 { + st,sdram-control = /bits/ 8 ; + st,sdram-timing = /bits/ 8 ; + st,sdram-refcount = <1539>; + }; +}; + +&pinctrl { + fmc_pins: fmc@0 { + pins { + pinmux = , + , + , + , + , + , + , + + , + , + , + , + , + , + , + , + , + , + , + + , + , + , + , + , + , + , + , + , + , + , + + , + , + , + , + , + , + , + + , + , + , + , + , + , + , + , + , + , + , + + , + , + , + , + , + , + , + , + , + ; + + slew-rate = <3>; + }; + }; +};